Datasheet Texas Instruments TLC2543MJ

12-Bit 66 kSPS ADC Ser.

Datasheets

PDF, 1.7 Mb, Revision: F, File published: Nov 27, 2001

Extract from the document

Out, Pgrmable MSB/LSB First, Pgrmable Power Down/Output Data Length, 11 Ch 20-CDIP -55 to 125

Lifecycle Status	Active (Recommended for new designs)
Manufacture's Sample Availability	No

# Input Channels	11
Analog Voltage AVDD(Max)	5.5 V
Analog Voltage AVDD(Min)	4.5 V
Architecture	SAR
Digital Supply(Max)	5.5 V
Digital Supply(Min)	4.5 V
INL(Max)	1 +/-LSB
Interface	SPI
Operating Temperature Range	-55 to 125 C
Package Group	CDIP
Package Size: mm2:W x L	See datasheet (CDIP) PKG
Power Consumption(Typ)	5 mW
Rating	Military
Reference Mode	Ext
Resolution	12 Bits
Sample Rate (max)	66kSPS SPS

RoHS	See ti.com

Download
Determining Minimum Acquisition Times for SAR ADCs, part 2
PDF, 215 Kb, File published: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

Series: TLC2543M (3)

Semiconductors > Space & High Reliability > Data Converter > Analog to Digital Converters