Datasheet Texas Instruments DAC3484
| Manufacturer | Texas Instruments |
| Series | DAC3484 |
Quad-Channel, 16-Bit, 1.25-GSPS, 1x-16x Interpolating Digital-to-Analog Converter (DAC)
Datasheets
DAC3484 Quad-Channel, 16-Bit, 1.25 GSPS Digital-to-Analog Converter (DAC) datasheet
PDF, 2.6 Mb, Revision: E, File published: Nov 4, 2015
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Prices
Status
| DAC3484IRKD25 | DAC3484IRKDR | DAC3484IRKDT | DAC3484IZAY | DAC3484IZAYR | |
|---|---|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | No | Yes | Yes | No |
Packaging
| DAC3484IRKD25 | DAC3484IRKDR | DAC3484IRKDT | DAC3484IZAY | DAC3484IZAYR | |
|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 |
| Pin | 88 | 88 | 88 | 196 | 196 |
| Package Type | RKD | RKD | RKD | ZAY | ZAY |
| Industry STD Term | WQFN-MR | WQFN-MR | WQFN-MR | NFBGA | NFBGA |
| JEDEC Code | S-PQFP-N | S-PQFP-N | S-PQFP-N | S-PBGA-N | S-PBGA-N |
| Package QTY | 25 | 2000 | 250 | 160 | 1000 |
| Carrier | SMALL T&R | LARGE T&R | SMALL T&R | JEDEC TRAY (5+1) | LARGE T&R |
| Device Marking | DAC3484I | DAC3484I | DAC3484I | DAC3484I | DAC3484I |
| Width (mm) | 9 | 9 | 9 | 12 | 12 |
| Length (mm) | 9 | 9 | 9 | 12 | 12 |
| Thickness (mm) | .75 | .75 | .75 | .9 | .9 |
| Pitch (mm) | .6 | .6 | .6 | .8 | .8 |
| Max Height (mm) | .8 | .8 | .8 | 1.4 | 1.4 |
| Mechanical Data | Download | Download | Download | Download | Download |
Parametrics
| Parameters / Models | DAC3484IRKD25 | DAC3484IRKDR | DAC3484IRKDT | DAC3484IZAY | DAC3484IZAYR |
|---|---|---|---|---|---|
| Approx. Price (US$) | 58.60 | 1ku | ||||
| Architecture | Current Source | Current Source | Current Source | Current Source | Current Source |
| DAC Channels | 4 | 4 | 4 | 4 | |
| DAC: Channels | 4 | ||||
| IMD3(dBc) | 81 | ||||
| Interface | Parallel LVDS | Parallel LVDS | Parallel LVDS | Parallel LVDS | Parallel LVDS |
| Interpolation | 2x 4x 8x 16x | 1x,2x,4x,8x,16x | 1x,2x,4x,8x,16x | 1x,2x,4x,8x,16x | 1x,2x,4x,8x,16x |
| Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | |
| Operating Temperature Range(C) | -40 to 85 | ||||
| Package Group | WQFN-MR | WQFN-MR | WQFN-MR | NFBGA | NFBGA |
| Package Size: mm2:W x L, PKG | 88WQFN-MR: 81 mm2: 9 x 9(WQFN-MR) | 88WQFN-MR: 81 mm2: 9 x 9(WQFN-MR) | 196NFBGA: 144 mm2: 12 x 12(NFBGA) | 196NFBGA: 144 mm2: 12 x 12(NFBGA) | |
| Package Size: mm2:W x L (PKG) | 88WQFN-MR: 81 mm2: 9 x 9(WQFN-MR) | ||||
| Power Consumption(Typ), mW | 1200 | 1200 | 1200 | 1200 | |
| Power Consumption(Typ)(mW) | 1200 | ||||
| Rating | Catalog | Catalog | Catalog | Catalog | Catalog |
| Resolution, Bits | 16 | 16 | 16 | 16 | |
| Resolution(Bits) | 16 | ||||
| SFDR, dB | 82 | 82 | 82 | 82 | |
| SFDR(dB) | 82 | ||||
| Sample / Update Rate, MSPS | 1250 | 1250 | 1250 | 1250 | |
| Sample / Update Rate(MSPS) | 1250 |
Eco Plan
| DAC3484IRKD25 | DAC3484IRKDR | DAC3484IRKDT | DAC3484IZAY | DAC3484IZAYR | |
|---|---|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant | Compliant | Compliant |
| Pb Free | Yes |
Application Notes
- Configuring and Optimizing On-Chip PLL of the DAC348xPDF, 420 Kb, File published: Jan 26, 2012
DAC348x PLL Consideration and Tradeoffs when using the DAC348x - Using DAC348x with Fault Detection and Auto Output Shut-off FeaturePDF, 162 Kb, File published: Feb 21, 2013
- Effects of Clock Spur on High Speed DAC Performance (Rev. A)PDF, 828 Kb, Revision: A, File published: May 18, 2015
- Design Summary Multi-row Quad Flat No-lead (MRQFN)PDF, 695 Kb, File published: Aug 29, 2012
Design Summary Multi-row Quad Flat No-lead (MRQFN) Design Summary Multi-row Quad Flat No-lead (MRQFN) - DAC348x Device Configuration and SynchronizationPDF, 317 Kb, File published: Feb 18, 2013
- Effects of Clock Noise on High Speed DAC PerformancePDF, 674 Kb, File published: Nov 8, 2012
- High Speed Digital-to-Analog Converters Basics (Rev. A)PDF, 829 Kb, Revision: A, File published: Oct 23, 2012
- QFN and SON PCB Attachment (Rev. B)PDF, 821 Kb, Revision: B, File published: Aug 24, 2018
- Superposition: The Hidden DAC Linearity ErrorPDF, 106 Kb, File published: Oct 2, 2000
A digital-to analog converter (DAC) translates digital signals to analog signals. For example, a 12-bit DAC takes a 12-bit binary number, called an input code, and converts it into one of 4,096 analog output voltages or currents. When the contribution to the output voltage or current of each individual bit is independent of any other, it means that the device exhibits no superposition error or tha
Model Line
Series: DAC3484 (5)
Manufacturer's Classification
- Semiconductors> Data Converters> Digital-to-Analog Converters (DACs)> High Speed DACs (>10MSPS)
