Datasheet Analog Devices AD8001ACHIPS

REVISIONS
LTR DESCRIPTION DATE (YR-MO-DA) APPROVED A Changes in accordance with N.O.R. 5962-R179-96. 96-07-11 M. A. FRYE B Drawing updated to reflect current requirements. -ro 00-12-20 R. MONNIN C Add case outline “H” and radiation hardness requirements. -gt 02-07-31 R. MONNIN D Drawing updated to reflect current requirements. -rrp 05-07-21 R. MONNIN E Add device type 02 tested at low dose rate. Make changes to paragraphs
1.2.2 and 1.5. Make changes to Table I. Make changes to footnotes 1/, 2/,
and 5/ as specified under Table I. Make changes to Table IIB and paragraph
4.4.4.1. Updated boilerplate paragraphs. -rrp 12-11-09 C. SAFFLE REV
SHEET
REV
SHEET
REV STATUS REV E E E E E E E E E E OF SHEETS SHEET 1 2 3 4 5 6 7 8 9 10 PMIC N/A PREPARED BY
RICK OFFICER STANDARD
MICROCIRCUIT
DRAWING DLA LAND AND MARITIME
COLUMBUS, OHIO 43218-3990
http://www.landandmaritime.dla.mil CHECKED BY
RAJESH PITHADIA
APPROVED BY THIS DRAWING IS AVAILABLE
FOR USE BY ALL
DEPARTMENTS
AND AGENCIES OF THE
DEPARTMENT OF DEFENSE AMSC N/A MICHAEL FRYE
DRAWING APPROVAL DATE MICROCIRCUIT, LINEAR, 800 MHz, CURRENT
FEEDBACK AMPLIFIER, MONOLITHIC SILICON 96-04-29
REVISION LEVEL …

a 800 MHz, 50 mW
Current Feedback Amplifier
AD8001 FEATURES
Excellent Video Specifications (RL = 150 , G = +2)
Gain Flatness 0.1 dB to 100 MHz
0.01% Differential Gain Error
0.025 Differential Phase Error
Low Power
5.5 mA Max Power Supply Current (55 mW)
High Speed and Fast Settling
880 MHz, –3 dB Bandwidth (G = +1)
440 MHz, –3 dB Bandwidth (G = +2)
1200 V/s Slew Rate
10 ns Settling Time to 0.1%
Low Distortion
–65 dBc THD, fC = 5 MHz
33 dBm Third Order Intercept, F1 = 10 MHz
–66 dB SFDR, f = 5 MHz
High Output Drive
70 mA Output Current
Drives Up to 4 Back-Terminated Loads (75 Each)
While Maintaining Good Differential Gain/Phase
Performance (0.05%/0.25) …

a 800 MHz, 50 mW
Current Feedback Amplifier
AD8001 FEATURES
Excellent Video Specifications (RL = 150
, G = +2)
Gain Flatness 0.1 dB to 100 MHz
0.01% Differential Gain Error
0.025 Differential Phase Error
Low Power
5.5 mA Max Power Supply Current (55 mW)
High Speed and Fast Settling
880 MHz, –3 dB Bandwidth (G = +1)
440 MHz, –3 dB Bandwidth (G = +2)
1200 V/s Slew Rate
10 ns Settling Time to 0.1%
Low Distortion
–65 dBc THD, fC = 5 MHz
33 dBm Third Order Intercept, F1 = 10 MHz
–66 dB SFDR, f = 5 MHz
High Output Drive
70 mA Output Current
Drives Up to 4 Back-Terminated Loads (75
Each)
While Maintaining Good Differential Gain/Phase
Performance (0.05%/0.25) …