Datasheets - PLD - FPGA Microsemi

Subsection: "PLD - FPGA"
Manufacturer: "Microsemi"
Search results: 17 Output: 1-17

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  1. SoC FPGA
  2. SmartFusion System on Chip (SoC) FPGAs are the only devices that integrate an FPGA fabric, ARM Cortex-M3 Processor, and programmable analog circuitry, offering the benefits of full customization and IP protection, while still being easy to use. ...
  1. SmartFusion System on Chip (SoC) FPGAs are the only devices that integrate an FPGA fabric, ARM Cortex-M3 Processor, and programmable analog circuitry, offering the benefits of full customization and IP protection, while still being easy to use. ...
  2. SmartFusion System on Chip (SoC) FPGAs are the only devices that integrate an FPGA fabric, ARM Cortex-M3 Processor, and programmable analog circuitry, offering the benefits of full customization and IP protection, while still being easy to use. ...
  3. Accelerator Series FPGAs ACT 3 Family Features: Up to 10,000 Gate Array Equivalent Gates (up to 25,000 equivalent PLD Gates) Highly Predictable Performance with 100% Automatic Place-and-Route As Low as 9.0 ns Clock-to-Output Times ( 1 Speed Grade) ...
  4. Accelerator Series FPGAs ACT 3 Family Features: Up to 10,000 Gate Array Equivalent Gates (up to 25,000 equivalent PLD Gates) Highly Predictable Performance with 100% Automatic Place-and-Route As Low as 9.0 ns Clock-to-Output Times ( 1 Speed Grade) ...
  5. Accelerator Series FPGAs ACT 3 Family Features: Up to 10,000 Gate Array Equivalent Gates (up to 25,000 equivalent PLD Gates) Highly Predictable Performance with 100% Automatic Place-and-Route As Low as 9.0 ns Clock-to-Output Times ( 1 Speed Grade) ...
  6. Accelerator Series FPGAs ACT 3 Family Features: Up to 10,000 Gate Array Equivalent Gates (up to 25,000 equivalent PLD Gates) Highly Predictable Performance with 100% Automatic Place-and-Route As Low as 9.0 ns Clock-to-Output Times ( 1 Speed Grade) ...
  7. Accelerator Series FPGAs ACT 3 Family Features: Up to 10,000 Gate Array Equivalent Gates (up to 25,000 equivalent PLD Gates) Highly Predictable Performance with 100% Automatic Place-and-Route As Low as 9.0 ns Clock-to-Output Times ( 1 Speed Grade) ...
  8. Accelerator Series FPGAs ACT 3 Family Features: Up to 10,000 Gate Array Equivalent Gates (up to 25,000 equivalent PLD Gates) Highly Predictable Performance with 100% Automatic Place-and-Route As Low as 9.0 ns Clock-to-Output Times ( 1 Speed Grade) ...
  9. Accelerator Series FPGAs ACT 3 Family Features: Up to 10,000 Gate Array Equivalent Gates (up to 25,000 equivalent PLD Gates) Highly Predictable Performance with 100% Automatic Place-and-Route As Low as 9.0 ns Clock-to-Output Times ( 1 Speed Grade) ...
  10. Accelerator Series FPGAs ACT 3 Family Features: Up to 10,000 Gate Array Equivalent Gates (up to 25,000 equivalent PLD Gates) Highly Predictable Performance with 100% Automatic Place-and-Route As Low as 9.0 ns Clock-to-Output Times ( 1 Speed Grade) ...
  11. Accelerator Series FPGAs ACT 3 Family Features: Up to 10,000 Gate Array Equivalent Gates (up to 25,000 equivalent PLD Gates) Highly Predictable Performance with 100% Automatic Place-and-Route As Low as 9.0 ns Clock-to-Output Times ( 1 Speed Grade) ...
  12. Accelerator Series FPGAs ACT 3 Family Features: Up to 10,000 Gate Array Equivalent Gates (up to 25,000 equivalent PLD Gates) Highly Predictable Performance with 100% Automatic Place-and-Route As Low as 9.0 ns Clock-to-Output Times ( 1 Speed Grade) ...
  13. ACT 2 Family FPGAs Features: Up to 8,000 Gate Array Gates (20,000 PLD equivalent gates) Replaces up to 200 TTL Packages Replaces up to eighty 20-Pin PAL Packages Design Library with over 500 Macro Functions Single-Module Sequence Functions ...
  14. ACT 2 Family FPGAs Features: Up to 8,000 Gate Array Gates (20,000 PLD equivalent gates) Replaces up to 200 TTL Packages Replaces up to eighty 20-Pin PAL Packages Design Library with over 500 Macro Functions Single-Module Sequence Functions ...
  15. ACT 2 Family FPGAs Features: Up to 8,000 Gate Array Gates (20,000 PLD equivalent gates) Replaces up to 200 TTL Packages Replaces up to eighty 20-Pin PAL Packages Design Library with over 500 Macro Functions Single-Module Sequence Functions ...

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