Stephen Woodward
EDN
An inexpensive way to implement highresolution digitaltoanalog conversion is to combine microcontrollerPWM (pulsewidthmodulated) outputs with precision analogvoltage references, CMOS switches, and analog filtering (Reference 1). However, PWMDAC design presents a big design problem: How do you adequately suppress the large acripple component inevitably present in the switch’s outputs? The ripple problem becomes especially severe when you use typical 16bit microcontrollerPWM peripherals for DAC control; such highresolution PWM functions usually have long cycles because of the large 216 countdown modulus of 16bit timers and comparators. This situation results in acfrequency components as inconveniently slow as 100 or 200 Hz. With such low ripple frequencies, if you employ enough ordinary analog lowpass filtering to suppress ripple to 16bit – that is, –96dB – noise levels, DAC settling can become a full second or more.

Figure 1. 
This DAC ripple filter combines a differential integrator, A_{1}, with a sampleandhold
amplifier, A_{2}, in a feedback loop operating synchronously with the PWM. 
The circuit in Figure 1 avoids most of the problems of lowpass filtering by combining a differential integrator, A_{1}, with a sampleandhold amplifier, A_{2}, in a feedback loop operating synchronously with the PWM cycle, T_{2} in Figure 2. If you make the integrator time constant equal to the PWM cycle time – that is, R_{1} × C_{1} = T_{2} – and, if the sample capacitor, C_{2}, is equal to the hold capacitor, C_{3}, then the filter can acquire and settle to a new DAC value in exactly one PWMcycle time. Although this approach hardly makes the resulting DAC exactly “high speed,” 0.01sec settling is still 100 times better than 1second settling. Just as important as speed, this improvement in settling time comes without compromising ripple attenuation. Ripple suppression of the synchronous filter is, in theory, infinite, and the only limit in practice is nonzerocharge injection from S_{2} into C_{3}. The choice of a lowinjectedcharge switch for S_{2} and an approximately 1µF capacitance for C_{3} can easily result in ripple amplitudes of microvolts.

Figure 2. 
The DAC output settles within one cycle. 
Optional feedbackvoltage divider R_{2}/R_{3} provides flexibility in a DACoutput span with common voltage references. For example, if R_{2}=R_{3}, then a 0 to 10 V output span will result from a 5 V reference. An additional advantage of this method of span adjustment is that output ripple remains independent of reference amplification.
Reference
Materials on the topic