Datasheet Texas Instruments TLV1570CPWRG4
| Manufacturer | Texas Instruments |
| Series | TLV1570 |
| Part Number | TLV1570CPWRG4 |
10-Bit, 1.25 MSPS ADC 8-Ch., DSP/(Q)SPI IF, Pgmable Int.
Datasheets
2.7 V To 5.5 V 8-Channel 10-Bit 1.25-MSPS Serial Analog-to-Digital Converter datasheet
PDF, 1.0 Mb, Revision: B, File published: Oct 13, 2000
Extract from the document
Prices
Detailed Description
Ref., Auto or S/W PowerDown, Very Low Power 20-TSSOP 0 to 70
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 20 |
| Package Type | PW |
| Industry STD Term | TSSOP |
| JEDEC Code | R-PDSO-G |
| Package QTY | 2000 |
| Carrier | LARGE T&R |
| Device Marking | TV1570 |
| Width (mm) | 4.4 |
| Length (mm) | 6.5 |
| Thickness (mm) | 1 |
| Pitch (mm) | .65 |
| Max Height (mm) | 1.2 |
| Mechanical Data | Download |
Parametrics
| # Input Channels | 8 |
| Analog Voltage AVDD(Max) | 5.5 V |
| Analog Voltage AVDD(Min) | 2.7 V |
| Architecture | SAR |
| Digital Supply(Max) | 5.5 V |
| Digital Supply(Min) | 2.7 V |
| INL(Max) | 1 +/-LSB |
| Input Range(Max) | 5.5 V |
| Input Type | Single-Ended |
| Integrated Features | N/A |
| Interface | SPI |
| Multi-Channel Configuration | Multiplexed |
| Operating Temperature Range | -40 to 85,0 to 70 C |
| Package Group | TSSOP |
| Package Size: mm2:W x L | 20TSSOP: 42 mm2: 6.4 x 6.5(TSSOP) PKG |
| Power Consumption(Typ) | 8 mW |
| Rating | Catalog |
| Reference Mode | Ext,Int |
| Resolution | 10 Bits |
| SINAD | 60 dB |
| SNR | 61 dB |
| Sample Rate (max) | 1.25MSPS SPS |
| Sample Rate(Max) | 1.25 MSPS |
| THD(Typ) | -72 dB |
Eco Plan
| RoHS | Compliant |
Application Notes
- Using the TMS320C5402 DMA Channels to Read from the TLV1570 ADCPDF, 423 Kb, File published: Jun 22, 2000
This application report presents hardware and software solutions for using the DMA channels of the 16-bit, fixed-point TMS320C5402 DSP to collect digital samples from the TLV1570 10-bit, 1.25-MSPS, 8-channel, serial analog-to-digital converter. - Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Kb, Revision: A, File published: Nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different - Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, File published: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
Model Line
Series: TLV1570 (11)
Manufacturer's Classification
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)
