Datasheet Texas Instruments THS1030IPWRG4
| Manufacturer | Texas Instruments |
| Series | THS1030 |
| Part Number | THS1030IPWRG4 |
10-Bit, 30 MSPS ADC Single Ch., Pin Comp. w/TLC876, Out of Range Indicator, PowerDown 28-TSSOP -40 to 85
Datasheets
3-V to 5.5-V 10-Bit, 30 MSPS CMOS Analog-to-Digital Converter (Rev. E)
PDF, 1.1 Mb, Revision: E, File published: Oct 30, 2003
Prices
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 28 |
| Package Type | PW |
| Industry STD Term | TSSOP |
| JEDEC Code | R-PDSO-G |
| Package QTY | 2000 |
| Carrier | LARGE T&R |
| Device Marking | TJ1030 |
| Width (mm) | 4.4 |
| Length (mm) | 9.7 |
| Thickness (mm) | 1 |
| Pitch (mm) | .65 |
| Max Height (mm) | 1.2 |
| Mechanical Data | Download |
Parametrics
| # Input Channels | 1 |
| Analog Input BW(MHz) | 150 |
| Approx. Price (US$) | 6.94 | 100u |
| Architecture | Pipeline |
| DNL(Max)(+/-LSB) | 1 |
| ENOB(Bits) | 7.8 |
| INL(Max)(+/-LSB) | 2 |
| Input Range | 2V (p-p) |
| Interface | Parallel CMOS |
| Operating Temperature Range(C) | -40 to 85 0 to 70 |
| Package Group | TSSOP |
| Package Size(mm2=WxL) | 28TSSOP: 62 mm2: 6.4 x 9.7 |
| Power Consumption(Typ)(mW) | 150 |
| Rating | Catalog |
| Reference Mode | Int Ext |
| Resolution(Bits) | 10 |
| SFDR(dB) | 53 |
| SINAD(dB) | 48.6 |
| SNR(dB) | 49.4 |
| Sample Rate (max)(SPS) | 30MSPS |
Eco Plan
| RoHS | Compliant |
| Pb Free | Yes |
Design Kits & Evaluation Modules
- Evaluation Modules & Boards: TSW2200EVM
TSW2200EVM: Low Cost Portable Power Supply
Lifecycle Status: Active (Recommended for new designs)
Application Notes
- CDCE62005 as Clock Solution for High-Speed ADCsPDF, 805 Kb, File published: Sep 4, 2008
TI has introduced a family of devices well-suited to meet the demands for high-speed ADC devices such as the ADS5527, which is capable of sampling up to 210 MSPS. To realize the full potential of thes - Smart Selection of ADC/DAC Enables Better Design of Software-Defined RadioPDF, 376 Kb, File published: Apr 28, 2009
This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs - Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)PDF, 327 Kb, Revision: A, File published: Sep 10, 2010
This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies - Phase Noise Performance and Jitter Cleaning Ability of CDCE72010PDF, 2.3 Mb, File published: Jun 2, 2008
This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the refe - CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital ConvertersPDF, 424 Kb, File published: Jun 8, 2008
Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed, high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483, which is capable of - Noise Analysis for High Speed Op Amps (Rev. A)PDF, 256 Kb, Revision: A, File published: Jan 17, 2005
As system bandwidths have increased, an accurate estimate of the noise contribution for each element in the signal channel has become increasingly important. Many designers are not, however, particula
Model Line
Series: THS1030 (9)
Manufacturer's Classification
- Semiconductors > Data Converters > Analog to Digital Converter > High Speed ADC (>10MSPS)
