PDF, 86 Kb, File published: Jun 1, 1997
Although the TMS320C30 serial ports were designed to be used as synchronous ports, they can be used as asynchronous ports under software control. This application note describes the hardware and software to use a TMS320C30 serial port as an asynchronous port. A schematic diagram and a lengthy code listing are provided to illustrate the solution.
PDF, 50 Kb, File published: Jul 1, 1997
This application report describes a speech recognition interface for a Microsoft Visual Basic (VB) application. The VB application is a virtual instrument control system that can be used in various environments. The speech recognition interface enhances the ability of the operator to control various system components without manually navigating the graphical user interface (GUI) screens of the V
PDF, 2.7 Mb, File published: Oct 1, 1994
This chapter, reprinted from IEEE Micro Magazine, describes the third generation of the TMS320 family of digital signal processors, the TMS320C30. It describes the origin and development of the 32-bit floating-point device. The topics covered include:- An overview of the characteristics of the TMS320C30 processor- A description of the architecture of the 320C30- A description of the
PDF, 4.6 Mb, File published: Oct 1, 1994
This chapter discusses how to use the TMS320C30s interfaces to connect to various external devices, including the implementation of parallel interface to devices with/without wait states, and the use of general I/O.Major topics discussed include:- System configuration options overview- Primary bus interface - Zero wait interface to RAMs - Ready generation - Bank switchin
PDF, 7.9 Mb, File published: Oct 1, 1994
This book describes the several types of transforms and related algorithms used on the TMS320C30 family of digital signal processors. These include:- The Fast Fourier Transforms (FFTs) - the complex radix-2 FFT - the complex radix-4 FFT - the real valued radix-2- The Discrete Hartley Transform (DHT)- The Discrete Cosine Transform (DCT)The book contains:- A descri
PDF, 3.2 Mb, File published: Oct 1, 1997
This chapter, reprinted from Proceedings of the IEEE, describes the origin and development of the TMS320 Family of Digital Signal Processors. The topics covered include:- An overview of the characteristics of digital signal processing- A history describing how digital signal processing has evolved over the last several decades- A description of the three generations of the TMS320 fam
PDF, 4.3 Mb, File published: Oct 1, 1997
Certain applications require the TMS320C30's high arithmetic throughput in the IEEE floating-point format. These applications benefit from a custom chip that performs conversions between the TMS320C30 native format and the single-precision IEEE Standard 754-1985. This chapter describes this custom chip.The description includes the following specific topics:- External interfaces- Arch
PDF, 112 Kb, File published: Jul 1, 1997
This application report describes how to develop a real-time system for producing lung sound spectrographs and other analyses using the Texas Instruments (TI?) TMS320C30 (C30) digital signal processor (DSP). The C30 floating point processor, hosted by a PC with a 486 DX2 processor (or better) is written entirely in the C language. With this real time system, analog input can be captured directly
PDF, 38 Kb, File published: Jun 1, 1997
The primary bus of the TMS320C30 has 24 address lines, which allows addressing of up to 16 megawords of memory. The expansion bus has 13 address lines, which allows addressing 8 Kwords. Using the techniques shown in this document, they can be used together to address a larger memory space of up to 68 gigawords.
PDF, 2.1 Mb, File published: Oct 1, 1997
This chapter shows how a 4.8-kbps CELP (code-excited linear prediction) can be quickly developed using SPOX. Using TMS320C30 DSP power, the ease of use provided by C, and the SPOX DSP library, an efficient and portable coder can be developed quickly and compiled and executed on a variety of hardware platforms.The chapter's main sections include:- A 4.8-kbps CELP coder- Implementation
PDF, 461 Kb, File published: Jan 30, 1997
Prolonged exposure to excessive levels of acoustic noise can cause permanent hearing loss, safety problems, and lower work productivity. An adaptive controller that optimally cancels unwanted acoustic noise while allowing the desired sounds, such as speech and warning signals, would be particularly useful for people using heavy machinery or working near engines. This document describes the design
PDF, 5.5 Mb, File published: Oct 1, 1994
This book presents a collection of efficient machine language programs for advanced applications with the TMS320C30 family of digital processors. These programs include the following categories:- Normal precision floating point math functions- Extended precision floating point math functions- Integer arithmetic routines- Vector utility routines- Radix 2 FFT routines- Linear
PDF, 6.2 Mb, File published: Oct 1, 1997
This book describes the architecture of the TMS320C30 APPB (applications board), part of the TSM320C30 XDS1000 Development System. The APPB was designed to provide a basic platform for software development and a variety of interfaces to the TMS320C30. The four key interfaces used on the APPB are:- SRAM- EPROM- Dual-port SRAM- DRAMThe book provides basic functional details of
PDF, 118 Kb, File published: Jul 1, 1997
This application report describes the development of a low bit rate speech coder based on the GSM HR (Half Rate) speech coding standard using the Texas Instruments (TITM) TMS320C30 digital signal processor (DSP). For storage applications, the delay introduced by the coder is not critical and the bit rate does not need to be constant. It is therefore possible to develop high performance coders wi
PDF, 115 Kb, File published: Jul 1, 1997
Artificial Neural Networks (ANN) is succesfully used in many areas such as fault detection, control and signal processing in our daily technology. Artificial Neural Networks have nonlineer structure and this is an effective feature that it approaches to the results of learning phase. Then, it gives results in test phase in short time (the degree about 10 to the -3 second). It is a very preferable
PDF, 191 Kb, Revision: A, File published: Aug 1, 1997
Systems engineers must apply real-time digital hardware solutions to signal processing problems to achieve the goals of reliability, repeatability, and flexibility. DSP offers the only such solution for many applications. Digital filter components are an integral part of many DSP systems. In particular, continuously programmable digital filters (CPDFs) offer a broad range of high-tech applicatio
PDF, 66 Kb, File published: Jun 1, 1997
This document discusses a fast way to calculate logarithms (base 2) on a TMS320C30 or TMS320C40. This TMS320C30/C40 function calculates the log base two of a number in about half the time of conventional algorithms. The method can easily be scaled for faster execution if less accuracy is desired. The mathematics of the function is discussed in detail. There are plots to determine accuracy at diffe
PDF, 1.8 Mb, File published: Oct 1, 1994
The Discrete Cosine Transform (DCT) stands apart from other orthogonal transforms because of its favorable comparison to the Karhunen-Loeve Transform (KLT). However, there is no fast algorithm to compute the KLT, which makes the DCT an attractive alternative. This book presents two 8X8 DCT routines and is divided into the following pieces:- The DCT algorithm- Implementation in the TMS320C2
PDF, 9.5 Mb, File published: Oct 1, 1994
Adaptive filtering techniques are necessary considerations when a specific signal output is desired but the coefficients of that filter cannot be determined at the outset. Sometimes this is because of changing line or transmission conditions. An adaptive filter is one which contains coefficients that are updated by an adaptive algorithm to optimize filter response to the desired performance crit
PDF, 6.4 Mb, File published: Oct 1, 1997
One way to improve the performance of a graphics system is to place an advanced digital signal processor between the host processor and the video controller. This book, the author's bachelor's thesis at MIT, discusses the suitability of the TMS320C30 Digital Signal Processor to that task.The book begins with a listing of the factors that make the TMS320C30 the digital signal processor of choi
PDF, 646 Kb, File published: Jun 1, 1996
An active noise control (ANC) system based on adaptive filter theory was developed in the 1980s; however, only with the recent introduction of powerful but inexpensive digital signal processor (DSP) hardware, such as the TMS320 family, has the technology become practical. The specialized DSPs were designed for real-time numerical processing of digitized signals. These devices have enabled the
PDF, 376 Kb, Revision: A, File published: May 1, 1996
The low-cost of the TMS320C32 (?C32) makes 32-bit floating-point digital signal processing (DSP) available to a wider variety of applications than ever before. This document explains in detail the features of the ?C32 enhanced memory interface with design examples for 32- 16- and 8-bit-wide external memories. Comprehensive diagrams show precise operation of the processor and complete circuits fo
PDF, 76 Kb, Revision: A, File published: Mar 1, 1996
The SN74ACT3638 FIFO contains a patented synchronous retransmit feature which allows data stored within the FIFO to be re-read starting at a selected position. This document shows the use of the retransmit feature with a digital signal processor (DSP) for finite impulse response (FIR) filtering. The application uses the 32-bit floating-point TMS320C31 and a SN74ACT3638 bi-directional clocked FIFO
PDF, 160 Kb, File published: Nov 1, 1995
This document describes using the TMS320 floating-point digital signal processor (DSP) optimizing C compiler and assembly language tools with the variable memory width and data sizes supported by the TMS320C32 ('C32) 32-bit DSP. An overview of the 'C32 strobe control registers is presented along with their configuration for use with a compiler linker or debugger. Different memory configurations
PDF, 108 Kb, Revision: A, File published: Mar 1, 1996
FIFO memories are used in digital signal processing systems for matching data paths with asynchronous clock or data rates. This document shows the SN74ACT3632 512?36?2 clocked FIFO as a single-chip bi-directional buffering solution that interfaces to the TI TMS320C3x and TMS320C4x floating-point DSP family. Programmable FIFO flags enable DMA control techniques that are used to handle the data flow
PDF, 248 Kb, Revision: D, File published: Aug 6, 2004
System board-level design and end-equipment environments can impact the operation of specific commercial and military 320C3x (320C30 320C31 320LC31 320C32 and 320VC33) 320C4x (320C40 and 320C44) digital signal processors (DSPs) and the military 320MCM42x (320MCM42C and 320MCM42D) multichip modules (MCMs) during power up. The 320MCM42x MCM incorporates two 320C40 DSP die.Specifically the s
PDF, 254 Kb, File published: Jan 1, 1995
An efficient method of detecting combustion engine knock is using spectral analysis. The detection process algorithm adapts to a no-knock reference at varying speeds and loads by using multiple frequencies. This document presents an problem overview current technology and two implementation examples are given to aid in the development of system specific hardware and software. The first system is
PDF, 168 Kb, File published: Nov 1, 1994
Four steps are required to set the TMS320 DSP interrupts: create a interrupt service routine initialize the vector table and set the memory map enable the interrupts in the CPU and enable the interrupt sources. This document shows how to set the interrupts in C C callable assembly or in-line C. Sample C code segments are provided. The appendix gives complete examples for setting interrupt vec
