Datasheet Texas Instruments SN74AVC16374DGVR
| Manufacturer | Texas Instruments |
| Series | SN74AVC16374 |
| Part Number | SN74AVC16374DGVR |
16-Bit Edge-Triggered D-Type Flip-Flop With 3-State Outputs 48-TVSOP -40 to 85
Datasheets
SN74AVC16374 datasheet
PDF, 854 Kb, Revision: H, File published: Feb 8, 2005
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Prices
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes |
Packaging
| Pin | 48 |
| Package Type | DGV |
| Industry STD Term | TVSOP |
| JEDEC Code | R-PDSO-G |
| Package QTY | 2000 |
| Carrier | LARGE T&R |
| Device Marking | CVA374 |
| Width (mm) | 4.4 |
| Length (mm) | 9.7 |
| Thickness (mm) | 1.05 |
| Pitch (mm) | .4 |
| Max Height (mm) | 1.2 |
| Mechanical Data | Download |
Parametrics
| 3-State Output | Yes |
| Bits | 16 |
| F @ Nom Voltage(Max) | 200 Mhz |
| ICC @ Nom Voltage(Max) | 0.04 mA |
| Operating Temperature Range | -40 to 85 C |
| Output Drive (IOL/IOH)(Max) | 12/-12 mA |
| Package Group | TVSOP |
| Package Size: mm2:W x L | 48TVSOP: 62 mm2: 6.4 x 9.7(TVSOP) PKG |
| Rating | Catalog |
| Schmitt Trigger | No |
| Technology Family | AVC |
| VCC(Max) | 3.6 V |
| VCC(Min) | 1.2 V |
| Voltage(Nom) | 1.2,1.5,1.8,2.5,3.3 V |
| tpd @ Nom Voltage(Max) | 7.3,8.4,6.7,4.1,3.3 ns |
Eco Plan
| RoHS | Compliant |
Application Notes
- Dynamic Output Control (DOC) Circuitry Technology And Applications (Rev. B)PDF, 126 Kb, Revision: B, File published: Jul 7, 1999
Texas Instruments (TI[TM]) next-generation logic is called the Advanced Very-low-voltage CMOS (AVC) family. The AVCfamily features TI?s Dynamic Output Control (DOC[TM]) circuit (patent pending). DOC circuitry automatically lowers the outputimpedance of the circuit at the beginning of a signal transition, providing enough current to achieve high signaling speeds, thensubsequently raises the i - AVC Logic Family Technology and Applications (Rev. A)PDF, 148 Kb, Revision: A, File published: Aug 26, 1998
Texas Instruments (TI?) announces the industry?s first logic family to achieve maximum propagation delays of less than 2 ns at 2.5 V. TI?s next-generation logic is the Advanced Very-low-voltage CMOS (AVC) family. Although optimized for 2.5-V systems, AVC logic supports mixed-voltage systems because it is compatible with 3.3-V and 1.8-V devices. The AVC family features TI?s Dynamic Output Control ( - Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. B)PDF, 390 Kb, Revision: B, File published: Apr 30, 2015
- 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)PDF, 895 Kb, Revision: B, File published: May 22, 2002
TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
Model Line
Series: SN74AVC16374 (5)
- 74AVC16374DGGRE4 SN74AVC16374DGGR SN74AVC16374DGVR SN74AVC16374GQLR SN74AVC16374ZQLR
Manufacturer's Classification
- Semiconductors > Logic > Flip-Flop/Latch/Register > D-Type Flip-Flop
