Datasheet Texas Instruments ADS7863IRGETG4

ManufacturerTexas Instruments
SeriesADS7863
Part NumberADS7863IRGETG4
Datasheet Texas Instruments ADS7863IRGETG4

Dual, 2MSPS, 12-Bit, 3+3 or 2+2 Channel, Simultaneous Sampling Analog-To-Digital SAR Converter 24-VQFN -40 to 125

Datasheets

Dual, 2MSPS, 12-Bit, 2 + 2 or 3 + 3 Channel, Simultaneous Sampling ADC datasheet
PDF, 1.2 Mb, Revision: E, File published: Jan 19, 2011
Extract from the document

Prices

Status

Lifecycle StatusNRND (Not recommended for new designs)
Manufacture's Sample AvailabilityNo

Packaging

Pin2424
Package TypeRGERGE
Industry STD TermVQFNVQFN
JEDEC CodeS-PQFP-NS-PQFP-N
Package QTY250250
CarrierSMALL T&RSMALL T&R
Device Marking7863I AADS
Width (mm)44
Length (mm)44
Thickness (mm).88.88
Pitch (mm).5.5
Max Height (mm)11
Mechanical DataDownloadDownload

Eco Plan

RoHSCompliant

Application Notes

  • An Introduction to the ADS7863A
    PDF, 153 Kb, File published: Apr 10, 2013
  • Interfacing the ADS786x to TMS470 Processors
    PDF, 59 Kb, File published: Jul 10, 2006
    This application report presents methods of interfacing the ADS7866/67/68 12/10/8-bit SAR analog-to-digital converter to the serial peripheral interface (SPI) port of the TMS470 processors. The flexible clocking scheme of the TMS470 SPI port, along with its internal 16-bit shift register provides an easy hardware/software interface to this series of high-speed, micro power SAR converters.
  • Interfacing the ADS786x to the MSP430F2013
    PDF, 90 Kb, File published: Jun 15, 2006
    This application report presents methods of interfacing the ADS7866/67/68 12/10/8-bit SAR analog-to-digital converter to the MSP430F2013 universal serial interface (USI) in SPI mode. The flexible clocking scheme of the USI port, along with the internal 16-bit shift register, provides an easy hardware/software interface to this series of high-speed, micro-power SAR converters.
  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revision: A, File published: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, File published: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
  • Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)
    PDF, 69 Kb, Revision: A, File published: May 18, 2015
  • A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)
    PDF, 425 Kb, Revision: B, File published: Oct 9, 2011
    This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference.
  • Principles of Data Acquisition and Conversion (Rev. A)
    PDF, 132 Kb, Revision: A, File published: Apr 16, 2015

Model Line

Manufacturer's Classification

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)