Datasheet Texas Instruments SN74LV00ADBLE
| Manufacturer | Texas Instruments |
| Series | SN74LV00A |
| Part Number | SN74LV00ADBLE |
Quadruple 2-Input Positive-NAND Gates 14-SSOP -40 to 85
Datasheets
Quadruple 2-Input Positive-NAND Gates datasheet
PDF, 1.2 Mb, Revision: K, File published: Feb 27, 2015
Extract from the document
Prices
Status
| Lifecycle Status | Obsolete (Manufacturer has discontinued the production of the device) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 14 |
| Package Type | DB |
| Industry STD Term | SSOP |
| JEDEC Code | R-PDSO-G |
| Width (mm) | 5.3 |
| Length (mm) | 6.2 |
| Thickness (mm) | 1.95 |
| Pitch (mm) | .65 |
| Max Height (mm) | 2 |
| Mechanical Data | Download |
Parametrics
| Approx. Price (US$) | 0.07 | 1ku |
| Bits(#) | 4 |
| F @ Nom Voltage(Max)(Mhz) | 70 |
| ICC @ Nom Voltage(Max)(mA) | 0.02 |
| Input Type | TTL |
| Operating Temperature Range(C) | -40 to 125 -40 to 85 |
| Output Drive (IOL/IOH)(Max)(mA) | 50/-50 |
| Output Type | TTL |
| Package Group | SSOP |
| Package Size: mm2:W x L (PKG) | 14TSSOP: 32 mm2: 6.4 x 5(TSSOP) |
| Rating | Catalog |
| Schmitt Trigger | No |
| Technology Family | LV-A |
| VCC(Max)(V) | 5.5 |
| VCC(Min)(V) | 2 |
| Voltage(Nom)(V) | 2.5 3.3 5 |
| tpd @ Nom Voltage(Max)(ns) | 20 13 8.5 |
Eco Plan
| RoHS | Not Compliant |
| Pb Free | No |
Model Line
Series: SN74LV00A (19)
Manufacturer's Classification
- Semiconductors > Logic > Gate > NAND Gate
