Datasheet Texas Instruments ADS7800BH-BI
| Manufacturer | Texas Instruments |
| Series | ADS7800 |
| Part Number | ADS7800BH-BI |
12-Bit 3us Sampling Analog-to-Digital Converter 24-CDIP SB
Datasheets
ADS7800: 12-Bit 3-µs Sampling Analog-to-Digital Converter datasheet
PDF, 845 Kb, Revision: A, File published: Feb 17, 2004
Extract from the document
Prices
Status
| Lifecycle Status | Obsolete (Manufacturer has discontinued the production of the device) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 24 |
| Package Type | JD |
| Industry STD Term | CDIP SB |
| JEDEC Code | R-CDIP-T |
| Width (mm) | 7.37 |
| Length (mm) | 27.94 |
| Thickness (mm) | 3.5 |
| Pitch (mm) | 2.54 |
| Max Height (mm) | 4.45 |
| Mechanical Data | Download |
Replacements
| Replacement | ADS7800BH |
| Replacement Code | S |
Parametrics
| # Input Channels | 1 |
| Analog Voltage AVDD(Max)(V) | 5.25 |
| Analog Voltage AVDD(Min)(V) | 4.75 |
| Approx. Price (US$) | 31.55 | 1ku |
| Architecture | SAR |
| Digital Supply(Max)(V) | 5.25 |
| Digital Supply(Min)(V) | 4.75 |
| INL(Max)(+/-LSB) | 0.5 |
| Input Range(Max)(V) | 10 |
| Input Range(Min)(V) | -10 |
| Input Type | Single-Ended |
| Integrated Features | Oscillator |
| Interface | Parallel |
| Multi-Channel Configuration | N/A |
| Operating Temperature Range(C) | -40 to 85 |
| Package Group | SOIC |
| Package Size: mm2:W x L (PKG) | See datasheet (CDIP SB) See datasheet (PDIP) |
| Power Consumption(Typ)(mW) | 135 |
| Rating | Catalog |
| Reference Mode | Int |
| Resolution(Bits) | 12 |
| SINAD(dB) | 72 |
| SNR(dB) | 73 |
| Sample Rate (max)(SPS) | 333kSPS |
| THD(Typ)(dB) | -80 |
Eco Plan
| RoHS | Not Compliant |
| Pb Free | No |
Application Notes
- Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)PDF, 69 Kb, Revision: A, File published: May 18, 2015
- A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)PDF, 425 Kb, Revision: B, File published: Oct 9, 2011
This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference. - Interleaving Analog-to-Digital ConvertersPDF, 64 Kb, File published: Oct 2, 2000
It is tempting when pushing the limits of analog-to-digital conversion to consider interleaving two or more converters to increase the sample rate. However, such designs must take into consideration several possible sources of error. - Using the ADS7800 12 Bit ADC with Unipolar Input SignalsPDF, 37 Kb, File published: Oct 2, 2000
The ADS7800 12 bit Sampling analog-to-digital-converter is designed to operate with bipolar inputs of В±5V or В±10V. With the addition of an external amplifier, the ADS7800 can be used for 10V or 20V unipolar inputs. Four unipolar input options are shown in this Bulletin. - Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Kb, Revision: A, File published: Nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different - What Designers Should Know About Data Converter DriftPDF, 95 Kb, File published: Oct 2, 2000
Exactly how inaccurate will a change in temperature make an analog-to-digital or digital-to-analog converter? As designers are well aware, a 12-bit device may provide a much lower accuracy at its operating-temperature extremes, perhaps only to 9 or even 8 bits. But for lack of more precise knowledge, many play it safe (and expensive) and overspecify. - A Clarification of Use of High-Speed S/H to Improve Sampling ADC PerformancePDF, 53 Kb, File published: Oct 2, 2000
You know it's going to be one of those days when you see the printed version of an article you wrote and realize that you have made an error in the presentation of your ideas. This is what happened to me as I read Use High Speed S/H to Improve Sampling ADC Performance (Design Update, Vol.1, No.1). This article will rectify the situation and further illuminate some important performance aspe - Principles of Data Acquisition and Conversion (Rev. A)PDF, 132 Kb, Revision: A, File published: Apr 16, 2015
- Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, File published: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to - Coding Schemes Used with Data Converters (Rev. A)PDF, 70 Kb, Revision: A, File published: May 15, 2015
Model Line
Series: ADS7800 (10)
Manufacturer's Classification
- Semiconductors > Data Converters > Analog to Digital Converter > Precision ADC (<=10MSPS)
Other Names:
ADS7800BHBI, ADS7800BH BI
