Datasheet Texas Instruments TLV1572IDR

ManufacturerTexas Instruments
SeriesTLV1572
Part NumberTLV1572IDR
Datasheet Texas Instruments TLV1572IDR

10-Bit, 1.25 MSPS ADC Single Ch., DSP/(Q)SPI IF, S&H, Very Low Power, Auto PowerDown 8-SOIC -40 to 85

Datasheets

2.8V to 5.5V 10-Bit 1.25 MSPS Serial A-D Converter With Auto-Power-Down datasheet
PDF, 732 Kb, Revision: A, File published: Sep 4, 1998
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Prices

Status

Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

Packaging

Pin8
Package TypeD
Industry STD TermSOIC
JEDEC CodeR-PDSO-G
Package QTY2500
CarrierLARGE T&R
Device MarkingV1572I
Width (mm)3.91
Length (mm)4.9
Thickness (mm)1.58
Pitch (mm)1.27
Max Height (mm)1.75
Mechanical DataDownload

Parametrics

# Input Channels1
Analog Voltage AVDD(Max)5.5 V
Analog Voltage AVDD(Min)2.7 V
ArchitectureSAR
Digital Supply(Max)5.5 V
Digital Supply(Min)2.7 V
INL(Max)1 +/-LSB
Input Range(Max)5.5 V
Input TypeSingle-Ended
Integrated FeaturesN/A
InterfaceSPI
Multi-Channel ConfigurationN/A
Operating Temperature Range-40 to 85,0 to 70 C
Package GroupSOIC
Package Size: mm2:W x L8SOIC: 29 mm2: 6 x 4.9(SOIC) PKG
Power Consumption(Typ)8 mW
RatingCatalog
Reference ModeExt
Resolution10 Bits
SINAD60 dB
SNR62 dB
Sample Rate (max)1.25MSPS SPS
Sample Rate(Max)1.25 MSPS
THD(Typ)-60 dB

Eco Plan

RoHSCompliant

Application Notes

  • Low-power data acquisition sub-system using the TI TLV1572
    PDF, 230 Kb, File published: Mar 11, 2005
  • Interfacing the TLV1572 Analog-to-Digital Converter to the TMS320C203 DSP (Rev. B)
    PDF, 135 Kb, Revision: B, File published: May 11, 1999
    This application report presents a hardware solution for interfacing the TLV1572 10-bit, 1.25 MSPS (Mega Samples Per Second), successive low-power analog-to-digital converter (ADC) to the TMS320C203 16-bit fixed-point digital signal processor (DSP). In addition, a C-callable interface program is shown which supports the data transfer between ADC and DSP.
  • Low-Power Signal Conditioning For A Pressure Sensor (Rev. A)
    PDF, 469 Kb, Revision: A, File published: May 18, 2015
  • Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
    PDF, 227 Kb, Revision: A, File published: Nov 10, 2010
    This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
  • Determining Minimum Acquisition Times for SAR ADCs, part 2
    PDF, 215 Kb, File published: Mar 17, 2011
    The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

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Manufacturer's Classification

  • Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)