Datasheet Texas Instruments DAC5675AHFG/EM
| Manufacturer | Texas Instruments |
| Series | DAC5675A-SP |
| Part Number | DAC5675AHFG/EM |
Class V, 14 Bit, 400 MSPS Digital-to-Analog Converter 52-CFP 25 Only
Datasheets
DAC5675A-SP Radiation-Tolerant, 14-Bit, 400-MSPS Digital-to-Analog Converter datasheet
PDF, 818 Kb, Revision: H, File published: Aug 4, 2016
Extract from the document
Prices
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 52 | 52 |
| Package Type | HFG | HFG |
| Industry STD Term | CFP | CFP |
| JEDEC Code | S-PQFP-F | S-PQFP-F |
| Package QTY | 1 | 1 |
| Device Marking | DAC5675AHFG/EM | EVAL ONLY |
| Width (mm) | 13.97 | 13.97 |
| Length (mm) | 13.97 | 13.97 |
| Thickness (mm) | 3.42 | 3.42 |
| Pitch (mm) | .64 | .64 |
| Max Height (mm) | 3.42 | 3.42 |
| Mechanical Data | Download | Download |
Parametrics
| Architecture | Current Sink |
| DAC Channels | 1 |
| DNL(Max) | 2 +/-LSB |
| Gain Error(Max) | 10 %FSR |
| INL(Max) | 4 +/-LSB |
| Interface | Parallel LVDS |
| Operating Temperature Range | -55 to 115,-55 to 125,25 Only C |
| Output Range Max. | 20 mA |
| Output Range Min. | 2 mA |
| Output Type | Current |
| Package Group | CFP |
| Package Size: mm2:W x L | See datasheet (CFP) PKG |
| Power Consumption(Typ) | 660 mW |
| Rating | Space |
| Reference: Type | Int |
| Resolution | 14 Bits |
| SFDR | 82 dB |
| SNR | 67 dB |
| Sample / Update Rate | 400 MSPS |
| Settling Time | 0.012 µs |
Eco Plan
| RoHS | See ti.com |
Design Kits & Evaluation Modules
- Evaluation Modules & Boards: DAC5675AEVM
DAC5675A 14-Bit, 400-MSPS Digital-to-Analog Converter Evaluation Module
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: TSW2200EVM
TSW2200 Low-Cost Portable Power Supply Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
Application Notes
- CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital ConvertersPDF, 424 Kb, File published: Jun 8, 2008
Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers - Phase Noise Performance and Jitter Cleaning Ability of CDCE72010PDF, 2.3 Mb, File published: Jun 2, 2008
This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig - High Speed Digital-to-Analog Converters Basics (Rev. A)PDF, 829 Kb, Revision: A, File published: Oct 23, 2012
Model Line
Series: DAC5675A-SP (3)
- 5962-0720401VXC 5962-0720402VXC DAC5675AHFG/EM
Manufacturer's Classification
- Semiconductors > Space & High Reliability > Data Converter > Digital to Analog Converters
