Datasheet Texas Instruments SN74S51J
| Manufacturer | Texas Instruments |
| Series | SN74S51 |
| Part Number | SN74S51J |
Dual 2-wide 2-input AND-OR-Invert Gates 14-CDIP 0 to 70
Datasheets
AND-OR-Invert Gates datasheet
PDF, 1.1 Mb, File published: Mar 1, 1988
Extract from the document
Prices
Status
| Lifecycle Status | Obsolete (Manufacturer has discontinued the production of the device) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 14 |
| Package Type | J |
| Industry STD Term | CDIP |
| JEDEC Code | R-GDIP-T |
| Width (mm) | 6.67 |
| Length (mm) | 19.56 |
| Thickness (mm) | 4.57 |
| Pitch (mm) | 2.54 |
| Max Height (mm) | 5.08 |
| Mechanical Data | Download |
Parametrics
| Approx. Price (US$) | 0.57 | 1ku |
| Bits(#) | 2 |
| F @ Nom Voltage(Max)(Mhz) | 50 |
| ICC @ Nom Voltage(Max)(mA) | 0.008 |
| Input Type | TTL |
| Operating Temperature Range(C) | 0 to 70 |
| Output Drive (IOL/IOH)(Max)(mA) | 0.4/-16 |
| Output Type | TTL |
| Package Group | PDIP SOIC |
| Package Size: mm2:W x L (PKG) | See datasheet (PDIP) See datasheet (CDIP) |
| Rating | Catalog |
| Schmitt Trigger | No |
| Technology Family | S |
| VCC(Max)(V) | 5.25 |
| VCC(Min)(V) | 4.75 |
| Voltage(Nom)(V) | 5 |
| tpd @ Nom Voltage(Max)(ns) | 22 |
Eco Plan
| RoHS | Not Compliant |
| Pb Free | No |
Model Line
Series: SN74S51 (5)
- SN74S51D SN74S51J SN74S51N SN74S51N3 SN74S51NE4
Manufacturer's Classification
- Semiconductors > Logic > Gate > Combination Gate
