Single Output LDO, 100mA, Fixed(3.3V), Shutdown, 1.25% Tolerance 5-SOT-23 -40 to 125
PDF, 82 Kb, Revision: F, File published: Jun 27, 2019
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PDF, 66 Kb, File published: May 7, 1999
This report presents a fundamental understanding on the theory of low-dropout voltage regulators using a PMOS FET as the pass element to adjust the output current to the load requirements.
PDF, 509 Kb, Revision: A, File published: Jun 4, 2008
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PDF, 110 Kb, Revision: A, File published: Jun 14, 2010
This reference design is presented to help application designers and others who are trying to use the MSP430 in a system with an input voltage in the range of 3.6 V to 5.5 V and who are also interested in using an easy-to-use low-dropout linear regulator (LDO) for a simple design but may not be as concerned about maintaining the highest possible efficiency or longest battery life.
PDF, 183 Kb, File published: Mar 21, 2007
PDF, 131 Kb, Revision: A, File published: Aug 9, 2017
This applicationreportexplainsdifferentmethodsof measuringthe PowerSupplyRejectionRatio(PSRR)of a Low-Dropout(LDO)regulatorand includesthe prosand consof thesemeasuringmethods
PDF, 41 Kb, File published: Jun 11, 1999
The TPS76301 low-dropout (LDO) adjustable linear regulator generates a regulated 1-V output from an input voltage ranging from 3 V to 6 V. The application circuit is based on the application detailed in the TPS76301 data sheet (TI Literature number SLVS181A Figure 21) except for the auxiliary circuit which is shown here in Figure 1.
PDF, 83 Kb, File published: May 7, 2002
Choosing an output capacitor for LDO regulators with PNP or PMOS pass element can be difficult to specific ESR requirements. This application note explains why higher ESR capacitors are necessary how to chose them and how to determine whether or not the regulator is stable.
PDF, 10.5 Mb, Revision: A, File published: Apr 22, 2013
This application report explains how to implement a low noise switch mode power supply solution. Itintroduces the sources of noise and explain how to minimize them. A big factor in noise generation andpropagation is the printed circuit board layout. Important basics are discussed. Circuit measurementtechniques are also explained to guide a design engineer towards a low noise but efficient so
PDF, 785 Kb, Revision: A, File published: Aug 9, 2017
Thisapplicationreportexplainsthe differencebetweennoiseand PSRRof an LDO.It also explainsthedifferentwaysnoiseis specifiedin LDOdatasheetsandwhichspecificationshouldbe usedin theapplication.Finallyit explainshow LDOnoiseis reduced.
PDF, 32 Kb, File published: Aug 16, 2002
This application report explains how to use a FET to overcome the input voltage limitation of a linear regulator.
PDF, 199 Kb, Revision: A, File published: Jun 14, 2010
This reference design is presented to help application designers and others who are trying to use the MSP430 in a system with an input voltage in the range of 3.6 V to 5.5 V and who are also interested in using an easy-to-use low-dropout linear regulator (LDO) for a simple design with extended battery life by putting the MSP430 into a low-power state between operating states.
PDF, 197 Kb, File published: Oct 21, 1999
This report provides an understanding of the terms and definitions of low dropout (LDO) voltage regulators and describes fundamental concepts including dropout voltage quiescent current standby current efficiency transient response line/load regulation power supply rejection output noise voltage accuracy and power dissipation. Each section includes an example to increase the understandab
PDF, 104 Kb, Revision: A, File published: Sep 11, 2009
PDF, 684 Kb, Revision: B, File published: May 6, 2013
The purpose of this application report is to aid the user in maximizing the power handling capability of Texas Instruments power packages by using the SOT-223 as an example.
PDF, 44 Kb, Revision: A, File published: Oct 13, 2006
With the proper considerations ceramic output capacitors can be used with low dropout regulators (LDO) and DC/DC switching converters that require tantulum output capacitors.
PDF, 52 Kb, File published: May 9, 2005
Not all low dropout (LDO) linear regulator data sheets provide the voltage dropout information needed for all applications. This application report shows a designer how to use an LDO data sheet's specified dropout performance to determine the dropout voltage at other operating conditions.
PDF, 284 Kb, File published: Aug 30, 1999
This application report provides a technical review of low dropout (LDO) voltage regulators and describes fundamental concepts including dropout voltage quiescent current and topologies. The report also includes detailed discussions of load/line regulation efficiency frequency response range of stable ESR and accuracy of LDO voltage regulators.
PDF, 169 Kb, Revision: A, File published: Apr 25, 2013
Ultra-low ESR capacitors such as ceramics are highly desirable because they can support fast-changingload transients and also bypass very high frequency noise coming from switching converter powersources which a linear regulator can not reject. However using ultra-low ESR capacitors on the output ofan LDO regulator requires that specific design changes be implemented to ensure loop stabili
PDF, 81 Kb, Revision: A, File published: Apr 24, 2013
The LP38851/52/53 devices with soft-start provide a reliable way to ensure that start-up into highcapacitive loads is uneventful and stress free.
PDF, 149 Kb, File published: Oct 8, 2010
PDF, 75 Kb, File published: May 8, 2010
The power limitations of the physical packaging for a linear regulator device can limit the total output current or the input-to-output voltage differential. This inherent limitation is not always apparent from the product data sheet and must be evaluated during the design phase. This application note shows how the package can limit the operating envelope of a linear regulator.
