Datasheet Texas Instruments X66AK2G02ZBB60
| Manufacturer | Texas Instruments |
| Series | 66AK2G02 |
| Part Number | X66AK2G02ZBB60 |
Multicore DSP+ARM KeyStone II System-on-Chip (SoC) 625-NFBGA 0 to 90
Datasheets
66AK2G0x Multicore DSP+ARM KeyStone II System-on-Chip (SoC) datasheet
PDF, 2.6 Mb, Revision: E, File published: Jun 8, 2017
Extract from the document
Prices
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes |
Packaging
| Pin | 625 |
| Package Type | ZBB |
| Package QTY | 1 |
| Carrier | JEDEC TRAY (5+1) |
| Width (mm) | 21 |
| Length (mm) | 21 |
| Thickness (mm) | 1.16 |
| Mechanical Data | Download |
Parametrics
| ARM CPU | 1 ARM Cortex-A15 |
| ARM MHz | 600 Max. |
| Applications | Communications and Telecom,Consumer Electronics,Industrial,Test and Measurement |
| DRAM | DDR3L |
| DSP | 1 C66x |
| DSP MHz | 600 Max. |
| EMAC | 1-port 1Gb,4-port 10/100 PRU EMAC |
| Hardware Accelerators | 4 PRU-ICSS,Security Accelerator |
| I2C | 3 |
| On-Chip L2 Cache | 512KB w/ECC ARM Cortex-A15,1024KB w/ECC C66x DSP |
| Operating Systems | Linux,TI-RTOS |
| Operating Temperature Range | 0 to 90 C |
| Other On-Chip Memory | 1024KB w/ECC |
| PCI/PCIe | PCIe Gen2 |
| Rating | Catalog |
| SPI | 4 |
| UART | 3 SCI |
| USB | 2 |
Eco Plan
| RoHS | See ti.com |
Design Kits & Evaluation Modules
- Daughter Cards: AUDK2G
66AK2Gx (K2G) Audio Daughter Card
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: K2GICE
66AK2Gx (K2G) Industrial Communications Engine (ICE)
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: EVMK2G
66AK2Gx (K2G) Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
Application Notes
- 66AK2G0x General-Purpose EVM Power Distribution Network AnalysisPDF, 584 Kb, File published: Nov 16, 2016
The purpose of this application report is to present the flow, the environment settings and methodology used for a performance analysis of critical power nets of a platform using the 66AK2G0x System-on-Chip (SoC) application processor. - 66AK2G02 Schematic ChecklistPDF, 95 Kb, File published: Sep 16, 2016
- 66AK2G02 Power Estimation ToolPDF, 27 Kb, File published: Jun 15, 2017
This power estimation spreadsheet provides power consumption estimates based on measured and simulated data; they are provided “as is” and are not ensured within a specified precision. Power consumption depends on electrical parameters, silicon process variations, environmental conditions, and use cases running on the processor during operation. Actual power consumption should be verified in the r - Hardware Design Guide for KeyStone II DevicesPDF, 1.8 Mb, File published: Mar 24, 2014
- SERDES Link Commissioning on KeyStone I and II DevicesPDF, 138 Kb, File published: Apr 13, 2016
The serializer-deserializer (SerDes) performs serial-to-parallel conversions on data received from a peripheral device and parallel-to-serial conversion on data received from the CPU. This application report explains the SerDes transmit and receive parameters tuning, tools and some debug techniques for TI Keystone I and Keystone II devices. - DDR3 Design Requirements for KeyStone Devices (Rev. B)PDF, 582 Kb, Revision: B, File published: Jun 5, 2014
- Processor SDK RTOS Audio Benchmark Starter KitPDF, 530 Kb, File published: Apr 12, 2017
The TI TMS320C6000в„ў Digital Signal Processors (DSPs) have many architectural advantages that make them ideal for computation-intensive real-time applications that are commonly used in audio processing application. This application notes describes Audio Benchmark Starterkit software that is intended to provide an easy and quick way to benchmark key audio functions on C66x and C674x DSP device - PRU-ICSS Feature ComparisonPDF, 29 Kb, File published: Jun 5, 2017
This application report documents the feature differences between the PRU subsystems available on different TI processors. - TI DSP BenchmarkingPDF, 62 Kb, File published: Jan 13, 2016
This application report provides benchmarks for the C674x DSP core, the C66x DSP core and the ARMВ®CortexВ®-A15 core. This document also shows how to reproduce these benchmarks on specific hardware platforms. - High-Speed Interface Layout Guidelines (Rev. G)PDF, 814 Kb, Revision: G, File published: Jul 27, 2017
As modern bus interface frequencies scale higher, care must be taken in the printed circuit board (PCB) layout phase of a design to ensure a robust solution.
Model Line
Series: 66AK2G02 (1)
- X66AK2G02ZBB60
Manufacturer's Classification
- Semiconductors > Processors > Digital Signal Processors > C6000 DSP + ARM Processors > 66AK2x
