Datasheet Texas Instruments CD74HC107M96E4
| Manufacturer | Texas Instruments |
| Series | CD74HC107 |
| Part Number | CD74HC107M96E4 |
High Speed CMOS Logic Dual Negative-Edge-Triggered J-K Flip-Flops with Reset 14-SOIC -55 to 125
Datasheets
CD54HC107, CD74HC107, CD54HCT107, CD74HCT107 datasheet
PDF, 722 Kb, Revision: D, File published: Oct 21, 2003
Extract from the document
Prices
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes |
Packaging
| Pin | 14 |
| Package Type | D |
| Industry STD Term | SOIC |
| JEDEC Code | R-PDSO-G |
| Package QTY | 2500 |
| Carrier | LARGE T&R |
| Device Marking | HC107M |
| Width (mm) | 3.91 |
| Length (mm) | 8.65 |
| Thickness (mm) | 1.58 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 1.75 |
| Mechanical Data | Download |
Parametrics
| Bits | 2 |
| F @ Nom Voltage(Max) | 70 Mhz |
| ICC @ Nom Voltage(Max) | 0.04 mA |
| Output Drive (IOL/IOH)(Max) | -6/6 mA |
| Package Group | SOIC |
| Package Size: mm2:W x L | 14SOIC: 52 mm2: 6 x 8.65(SOIC) PKG |
| Rating | Catalog |
| Schmitt Trigger | No |
| Technology Family | HC |
| VCC(Max) | 6 V |
| VCC(Min) | 2 V |
| Voltage(Nom) | 3.3,5 V |
| tpd @ Nom Voltage(Max) | 51 ns |
Eco Plan
| RoHS | Compliant |
Application Notes
- Power-Up Behavior of Clocked Devices (Rev. A)PDF, 34 Kb, Revision: A, File published: Feb 6, 2015
- Selecting the Right Texas Instruments Signal SwitchPDF, 769 Kb, File published: Sep 7, 2001
Texas Instruments offers a wide variety of electronic switches (digital analog bilateral bilateral analog) in a variety of families including CBT CBTLV HC LV and LVC. Depending on the application the right solution may be an analog switch that passes digital signals or vice versa. This application report summarizes the various switching technologies and provides considerations for choosi - Using High Speed CMOS and Advanced CMOS in Systems With Multiple VccPDF, 43 Kb, File published: Apr 1, 1996
Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren - SN54/74HCT CMOS Logic Family Applications and RestrictionsPDF, 102 Kb, File published: May 1, 1996
The TI SN54/74HCT family of CMOS devices is a subgroup of the SN74HC series with the HCT circuitry modified to meet the interfacing requirements of TTL outputs to high-speed CMOS inputs. The HCT devices can be driven by the TTL circuits directly without additional components. This document describes the TTL/HC interface the operating voltages circuit noise and power consumption. A Bergeron anal
Model Line
Series: CD74HC107 (9)
Manufacturer's Classification
- Semiconductors > Logic > Flip-Flop/Latch/Register > J-K Flip-Flop
