Datasheet Texas Instruments TLV2553IDWR
| Manufacturer | Texas Instruments |
| Series | TLV2553 |
| Part Number | TLV2553IDWR |
12-Bit, 200 KSPS, 11 Channel, Low Power, Serial ADC Serial Out, w/Pwrdwn 20-SOIC -40 to 85
Datasheets
TLV2553 12-Bit, 200-KSPS, 11-Channel, Low-Power, Serial ADC datasheet
PDF, 1.2 Mb, Revision: C, File published: Jul 9, 2015
Extract from the document
Prices
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 20 |
| Package Type | DW |
| Industry STD Term | SOIC |
| JEDEC Code | R-PDSO-G |
| Package QTY | 2000 |
| Carrier | LARGE T&R |
| Device Marking | TLV2553I |
| Width (mm) | 7.5 |
| Length (mm) | 12.8 |
| Thickness (mm) | 2.35 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 2.65 |
| Mechanical Data | Download |
Parametrics
| # Input Channels | 11 |
| Analog Voltage AVDD(Max) | 5.5 V |
| Analog Voltage AVDD(Min) | 2.7 V |
| Architecture | SAR |
| Digital Supply(Max) | 5.5 V |
| Digital Supply(Min) | 2.7 V |
| INL(Max) | 1 +/-LSB |
| Input Range(Max) | 5.5 V |
| Input Type | Single-Ended |
| Integrated Features | Oscillator |
| Interface | SPI |
| Multi-Channel Configuration | Multiplexed |
| Operating Temperature Range | -40 to 85 C |
| Package Group | SOIC |
| Package Size: mm2:W x L | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) PKG |
| Power Consumption(Typ) | 2.43 mW |
| Rating | Catalog |
| Reference Mode | Ext |
| Resolution | 12 Bits |
| SINAD | 69.5 dB |
| SNR | 69.5 dB |
| Sample Rate (max) | 200kSPS SPS |
| Sample Rate(Max) | 0.2 MSPS |
Eco Plan
| RoHS | Compliant |
Design Kits & Evaluation Modules
- Evaluation Modules & Boards: TLV2553EVM-PDK
TLV2553 Evaluation Module
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: 5-6KINTERFACE
5-6K Interface Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
Application Notes
- Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Kb, Revision: A, File published: Nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different - Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, File published: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
Model Line
Series: TLV2553 (8)
Manufacturer's Classification
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)
