Datasheet Texas Instruments SN74LVC08ADT
Manufacturer | Texas Instruments |
Series | SN74LVC08A |
Part Number | SN74LVC08ADT |
Quadruple 2-Input Positive-AND Gate 14-SOIC -40 to 125
Datasheets
SN74LVC08A Quadruple 2-Input Positive-AND Gates datasheet
PDF, 1.4 Mb, Revision: S, File published: Aug 11, 2015
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Prices
Status
Lifecycle Status | Active (Recommended for new designs) |
Manufacture's Sample Availability | No |
Packaging
Pin | 14 |
Package Type | D |
Industry STD Term | SOIC |
JEDEC Code | R-PDSO-G |
Package QTY | 250 |
Carrier | SMALL T&R |
Device Marking | LVC08A |
Width (mm) | 3.91 |
Length (mm) | 8.65 |
Thickness (mm) | 1.58 |
Pitch (mm) | 1.27 |
Max Height (mm) | 1.75 |
Mechanical Data | Download |
Parametrics
Bits | 4 |
ICC @ Nom Voltage(Max) | 0.01 mA |
Operating Temperature Range | -40 to 125 C |
Output Drive (IOL/IOH)(Max) | -24/24 mA |
Package Group | SOIC |
Package Size: mm2:W x L | 14SOIC: 52 mm2: 6 x 8.65(SOIC) PKG |
Rating | Catalog |
Schmitt Trigger | No |
Technology Family | LVC |
VCC(Max) | 3.6 V |
VCC(Min) | 1.65 V |
Voltage(Nom) | 1.8,2.5,2.7,3.3 V |
tpd @ Nom Voltage(Max) | 9.8,6.9,4.8,4.1 ns |
Eco Plan
RoHS | Compliant |
Application Notes
- LVC Characterization InformationPDF, 114 Kb, File published: Dec 1, 1996
This document provides characterization information about low-voltage logic (LVL) that operates from a 3.3-V power supply. It addresses the issues of interfacing to 5-V logic ac performance power considerations input and output characteristics and signal integrity for this family of devices. - Use of the CMOS Unbuffered Inverter in Oscillator CircuitsPDF, 796 Kb, File published: Nov 6, 2003
CMOS devices have a high input impedance high gain and high bandwidth. These characteristics are similar to ideal amplifier characteristics and hence a CMOS buffer or inverter can be used in an oscillator circuit in conjunction with other passive components. Now CMOS oscillator circuits are widely used in high-speed applications because they are economical easy to use and take significantly - Power-Up 3-State (PU3S) Circuits in TI Standard Logic DevicesPDF, 209 Kb, File published: May 10, 2002
Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features
Model Line
Series: SN74LVC08A (27)
- HVAL02231ARGYR SN74LVC08AD SN74LVC08ADBLE SN74LVC08ADBR SN74LVC08ADBRE4 SN74LVC08ADBRG4 SN74LVC08ADE4 SN74LVC08ADG4 SN74LVC08ADR SN74LVC08ADRE4 SN74LVC08ADRG3 SN74LVC08ADRG4 SN74LVC08ADT SN74LVC08ANSR SN74LVC08ANSRE4 SN74LVC08APW SN74LVC08APWE4 SN74LVC08APWG4 SN74LVC08APWLE SN74LVC08APWR SN74LVC08APWRE4 SN74LVC08APWRG3 SN74LVC08APWRG4 SN74LVC08APWT SN74LVC08APWTG4 SN74LVC08ARGYR SN74LVC08ARGYRG4
Manufacturer's Classification
- Semiconductors > Logic > Gate > AND Gate