Datasheet Texas Instruments SN74LV125ADR
| Manufacturer | Texas Instruments |
| Series | SN74LV125A |
| Part Number | SN74LV125ADR |
Quadruple Bus Buffer Gates With 3-State Outputs 14-SOIC -40 to 125
Datasheets
SN74LV125A Quadruple Bus Buffer Gates With 3-State Outputs datasheet
PDF, 1.2 Mb, Revision: N, File published: Jan 19, 2016
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Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | Yes |
Packaging
| Pin | 14 |
| Package Type | D |
| Industry STD Term | SOIC |
| JEDEC Code | R-PDSO-G |
| Package QTY | 2500 |
| Carrier | LARGE T&R |
| Device Marking | LV125A |
| Width (mm) | 3.91 |
| Length (mm) | 8.65 |
| Thickness (mm) | 1.58 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 1.75 |
| Mechanical Data | Download |
Parametrics
| Bits | 4 |
| F @ Nom Voltage(Max) | 110 Mhz |
| ICC @ Nom Voltage(Max) | 0.02 mA |
| Operating Temperature Range | -40 to 125,-40 to 85 C |
| Output Drive (IOL/IOH)(Max) | -50/50 mA |
| Package Group | SOIC |
| Package Size: mm2:W x L | 14SOIC: 52 mm2: 6 x 8.65(SOIC) PKG |
| Rating | Catalog |
| Schmitt Trigger | No |
| Technology Family | LV-A |
| VCC(Max) | 5.5 V |
| VCC(Min) | 2 V |
| Voltage(Nom) | 2.5,3.3,5 V |
| tpd @ Nom Voltage(Max) | 15.5,9.5,6.5 ns |
Eco Plan
| RoHS | Compliant |
Model Line
Series: SN74LV125A (20)
Manufacturer's Classification
- Semiconductors > Logic > Buffer/Driver/Transceiver > Non-Inverting Buffer/Driver
