Datasheet Texas Instruments OPA832IDBVR
Manufacturer | Texas Instruments |
Series | OPA832 |
Part Number | OPA832IDBVR |
Low-Power, Single-Supply, Fixed-Gain Video Buffer Amplifier 5-SOT-23 -40 to 85
Datasheets
Low-Power, Single-Supply, Fixed-Gain Video Buffer Amplifier datasheet
PDF, 750 Kb, Revision: E, File published: Aug 28, 2008
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Status
Lifecycle Status | Active (Recommended for new designs) |
Manufacture's Sample Availability | No |
Packaging
Pin | 5 |
Package Type | DBV |
Industry STD Term | SOT-23 |
JEDEC Code | R-PDSO-G |
Package QTY | 3000 |
Carrier | LARGE T&R |
Device Marking | A74 |
Width (mm) | 1.6 |
Length (mm) | 2.9 |
Thickness (mm) | 1.2 |
Pitch (mm) | .95 |
Max Height (mm) | 1.45 |
Mechanical Data | Download |
Parametrics
2nd Harmonic | 64 dBc |
3rd Harmonic | 57 dBc |
@ MHz | 5 |
Acl, min spec gain | 1 V/V |
Additional Features | Decompensated |
Architecture | Bipolar,Voltage FB |
BW @ Acl | 80 MHz |
CMRR(Min) | 72 dB |
CMRR(Typ) | 72 dB |
GBW(Typ) | 160 MHz |
Input Bias Current(Max) | 10000000 pA |
Iq per channel(Max) | 4.7 mA |
Iq per channel(Typ) | 4.25 mA |
Number of Channels | 1 |
Offset Drift(Typ) | 20 uV/C |
Operating Temperature Range | -40 to 85 C |
Output Current(Typ) | 80 mA |
Package Group | SOT-23 |
Package Size: mm2:W x L | 5SOT-23: 8 mm2: 2.8 x 2.9(SOT-23) PKG |
Rail-to-Rail | In to V-,Out |
Rating | Catalog |
Slew Rate(Typ) | 350 V/us |
Total Supply Voltage(Max) | 11 +5V=5, +/-5V=10 |
Total Supply Voltage(Min) | 2.8 +5V=5, +/-5V=10 |
Vn at 1kHz(Typ) | 9.2 nV/rtHz |
Vn at Flatband(Typ) | 9.3 nV/rtHz |
Vos (Offset Voltage @ 25C)(Max) | 7 mV |
Eco Plan
RoHS | Compliant |
Design Kits & Evaluation Modules
- Evaluation Modules & Boards: DEM-OPA-SOT-1A
Unpopulated PCB Compatible w/High Speed, Wide Bandwidth Op Amps in SOT(DBV) Pkg
Lifecycle Status: Active (Recommended for new designs) - Evaluation Modules & Boards: DEM-OPA-SO-1A
DEM-OPA-SO-1A Unpopulated PCB Compatible w/High Speed Wide Bandwidth Op Amps in 8-lead SOIC (D) Pkg
Lifecycle Status: Active (Recommended for new designs)
Application Notes
- RLC Filter Design for ADC Interface Applications (Rev. A)PDF, 299 Kb, Revision: A, File published: May 13, 2015
As high performance Analog-to-Digital Converters (ADCs) continue to improve in their performance, the last stage interface from the final amplifier into the converter inputs becomes a critical element in the system design if the full converter dynamic range is desired. This application note describes the performance and design equations for a simple passive 2nd-order filter used successfully in AD - Measuring Board Parasitics in High-Speed Analog DesignPDF, 134 Kb, File published: Jul 7, 2003
Successful circuit designs using high-speed amplifiers can depend upon understanding and identifying parasitic PCB components. Simulating a design while including PCB parasitics can protect against unpleasant production surprises. This application report discusses an easy method for measuring parasitic components in a prototype or final PC board design by using a standard oscilloscope and low freq - Noise Analysis for High Speed Op Amps (Rev. A)PDF, 256 Kb, Revision: A, File published: Jan 17, 2005
As system bandwidths have increased an accurate estimate of the noise contribution for each element in the signal channel has become increasingly important. Many designers are not however particularly comfortable with the calculations required to predict the total noise for an op amp or in the conversions between the different descriptions of noise. Considerable inconsistency between manufactu
Model Line
Series: OPA832 (4)
- OPA832ID OPA832IDBVR OPA832IDBVT OPA832IDBVTG4
Manufacturer's Classification
- Semiconductors > Amplifiers > Operational Amplifiers (Op Amps) > High-Speed Op Amps (>=50MHz)