Datasheet Texas Instruments ADS8342IBPFBT
| Manufacturer | Texas Instruments |
| Series | ADS8342 |
| Part Number | ADS8342IBPFBT |
16-Bit 250 kSPS ADC Parallel Out, 4 true bipolar channels 48-TQFP -40 to 85
Datasheets
ADS8342: 16-Bit, 250kSPS, 4-Channel, Parallel Output Analog-to-Digital Converter datasheet
PDF, 1.5 Mb, File published: Feb 6, 2003
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Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 48 | 48 |
| Package Type | PFB | PFB |
| Industry STD Term | TQFP | TQFP |
| JEDEC Code | S-PQFP-G | S-PQFP-G |
| Package QTY | 250 | 250 |
| Carrier | SMALL T&R | SMALL T&R |
| Device Marking | B | ADS8342I |
| Width (mm) | 7 | 7 |
| Length (mm) | 7 | 7 |
| Thickness (mm) | 1 | 1 |
| Pitch (mm) | .5 | .5 |
| Max Height (mm) | 1.2 | 1.2 |
| Mechanical Data | Download | Download |
Parametrics
| # Input Channels | 4 |
| Analog Voltage AVDD(Max) | 5.25 V |
| Analog Voltage AVDD(Min) | -5.25 V |
| Architecture | SAR |
| Digital Supply(Max) | 5.5 V |
| Digital Supply(Min) | 2.7 V |
| INL(Max) | 4 +/-LSB |
| Input Range(Max) | 2.5 V |
| Input Range(Min) | -2.5 V |
| Input Type | Pseudo-Differential,Single-Ended |
| Integrated Features | N/A |
| Interface | Parallel |
| Multi-Channel Configuration | Multiplexed |
| Operating Temperature Range | -40 to 85 C |
| Package Group | TQFP |
| Package Size: mm2:W x L | 48TQFP: 81 mm2: 9 x 9(TQFP) PKG |
| Power Consumption(Typ) | 208 mW |
| Rating | Catalog |
| Reference Mode | Ext |
| Resolution | 16 Bits |
| SINAD | 84.6 dB |
| SNR | 86 dB |
| Sample Rate (max) | 250kSPS SPS |
| Sample Rate(Max) | 0.25 MSPS |
| THD(Typ) | -89 dB |
Eco Plan
| RoHS | Compliant |
Design Kits & Evaluation Modules
- Evaluation Modules & Boards: ADS8342EVM
ADS8342 Evaluation Module
Lifecycle Status: Active (Recommended for new designs)
Application Notes
- ADS8342 ADC SAR InputsPDF, 223 Kb, File published: Jan 6, 2005
Successive approximation register analog-to-digital converters (SAR ADCs) present a challenging load to the circuitry that drives the analog inputs. Specifications in data sheets may mislead the user into thinking that analog inputs, for example, are static, when in fact they create a highly dynamic load that requires specially designed buffer circuitry. This article looks at the architecture of - Controlling the ADS8342 with TMS320 Series DSP'sPDF, 109 Kb, File published: Sep 22, 2003
The ADS8342 16-bit, bipolar input, parallel output analog-to-digital converter has a number of features that allow for an easy interface to many of the TMS320? DSP family of digital signal processors from Texas Instruments. This application note focuses on configuring, sampling, and converting analog data presented to the ADS8342 ADC, with software examples using the TMS320C6711 and C5416 DSPs. Th - Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Kb, Revision: A, File published: Nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different - Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, File published: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to
Model Line
Series: ADS8342 (3)
- ADS8342IBPFBT ADS8342IPFBT ADS8342IPFBTG4
Manufacturer's Classification
- Semiconductors > Data Converters > Analog-to-Digital Converters (ADCs) > Precision ADCs (<=10MSPS)
