Datasheet Texas Instruments CD74ACT109M96
| Manufacturer | Texas Instruments |
| Series | CD74ACT109 |
| Part Number | CD74ACT109M96 |
Dual Positive-Edge Triggered J-K Flip-Flops with Set and Reset 16-SOIC -55 to 125
Datasheets
CD54ACT109, CD74ACT109 datasheet
PDF, 878 Kb, File published: Jan 24, 2003
Extract from the document
Prices
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 16 |
| Package Type | D |
| Industry STD Term | SOIC |
| JEDEC Code | R-PDSO-G |
| Package QTY | 2500 |
| Carrier | LARGE T&R |
| Device Marking | ACT109M |
| Width (mm) | 3.91 |
| Length (mm) | 9.9 |
| Thickness (mm) | 1.58 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 1.75 |
| Mechanical Data | Download |
Parametrics
| Bits | 2 |
| F @ Nom Voltage(Max) | 90 Mhz |
| ICC @ Nom Voltage(Max) | 0.04 mA |
| Output Drive (IOL/IOH)(Max) | -24/24 mA |
| Package Group | SOIC |
| Package Size: mm2:W x L | 16SOIC: 59 mm2: 6 x 9.9(SOIC) PKG |
| Rating | Catalog |
| Schmitt Trigger | No |
| Technology Family | ACT |
| VCC(Max) | 5.5 V |
| VCC(Min) | 4.5 V |
| Voltage(Nom) | 5 V |
| tpd @ Nom Voltage(Max) | 11.1 ns |
Eco Plan
| RoHS | Compliant |
Application Notes
- Selecting the Right Level Translation Solution (Rev. A)PDF, 313 Kb, Revision: A, File published: Jun 22, 2004
Supply voltages continue to migrate to lower nodes to support today's low-power high-performance applications. While some devices are capable of running at lower supply nodes others might not have this capability. To haveswitching compatibility between these devices the output of each driver must be compliant with the input of the receiver that it is driving. There are several level-translati - Power-Up Behavior of Clocked Devices (Rev. A)PDF, 34 Kb, Revision: A, File published: Feb 6, 2015
- Using High Speed CMOS and Advanced CMOS in Systems With Multiple VccPDF, 43 Kb, File published: Apr 1, 1996
Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren
Model Line
Series: CD74ACT109 (6)
- CD74ACT109E CD74ACT109EE4 CD74ACT109M CD74ACT109M96 CD74ACT109M96E4 CD74ACT109ME4
Manufacturer's Classification
- Semiconductors > Logic > Flip-Flop/Latch/Register > J-K Flip-Flop
