Datasheet Texas Instruments SN74ALVCHS162830DBBR
| Manufacturer | Texas Instruments |
| Series | SN74ALVCHS162830 |
| Part Number | SN74ALVCHS162830DBBR |
1-Bit to 2-Bit Address Driver With 3-State Outputs 80-TSSOP -40 to 85
Datasheets
SN74ALVCHS162830 datasheet
PDF, 297 Kb, Revision: H, File published: Sep 10, 2004
Extract from the document
Prices
Status
| Lifecycle Status | Obsolete (Manufacturer has discontinued the production of the device) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 80 |
| Package Type | DBB |
| Industry STD Term | TSSOP |
| JEDEC Code | R-PDSO-G |
| Width (mm) | 6.1 |
| Length (mm) | 17 |
| Thickness (mm) | 1.15 |
| Pitch (mm) | .4 |
| Max Height (mm) | 1.2 |
| Mechanical Data | Download |
Replacements
| Replacement | SN74ALVCHS162830GR |
| Replacement Code | S |
Parametrics
| Approx. Price (US$) | 2.12 | 1ku |
| Bits(#) | 2 |
| F @ Nom Voltage(Max)(Mhz) | 100 |
| ICC @ Nom Voltage(Max)(mA) | 0.4 |
| Input Type | LVTTL |
| Operating Temperature Range(C) | -40 to 85 |
| Output Drive (IOL/IOH)(Max)(mA) | -12/12 |
| Output Type | LVTTL |
| Package Group | TSSOP |
| Package Size: mm2:W x L (PKG) | 80TSSOP: 138 mm2: 8.1 x 17(TSSOP) |
| Rating | Catalog |
| Schmitt Trigger | No |
| Technology Family | ALVC |
| VCC(Max)(V) | 3.6 |
| VCC(Min)(V) | 1.65 |
| Voltage(Nom)(V) | 1.8 2.5 2.7 3.3 |
| tpd @ Nom Voltage(Max)(ns) | 3.8 4 3.5 |
Eco Plan
| RoHS | Not Compliant |
| Pb Free | No |
Application Notes
- TI SN74ALVC16835 Component Specification Analysis for PC100PDF, 43 Kb, File published: Aug 3, 1998
The PC100 standard establishes design parameters for the PC SDRAM DIMM that is designed to operate at 100 MHz. The 168-pin, 8-byte, registered SDRAM DIMM is a JEDEC-defined device (JC-42.5-96-146A). Some of the defined signal paths include data signals, address signals, and control signals. This application report discusses the SN74ALVC16835 18-bit universal bus driver that is available from T - Logic Solutions for PC-100 SDRAM Registered DIMMs (Rev. A)PDF, 96 Kb, Revision: A, File published: May 13, 1998
Design of high-performance personal computer (PC) systems that are capable of meeting the needs imposed by modern operating systems and software includes the use of large banks of SDRAMs on DIMMs (see Figure 1).To meet the demands of stable functionality over the broad spectrum of operating environments, meet system timing needs, and to support data integrity, the loads presented by the large - Bus-Hold CircuitPDF, 418 Kb, File published: Feb 5, 2001
When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of - 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)PDF, 895 Kb, Revision: B, File published: May 22, 2002
TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
Model Line
Series: SN74ALVCHS162830 (2)
- SN74ALVCHS162830DBBR SN74ALVCHS162830GR
Manufacturer's Classification
- Semiconductors > Logic > Buffer/Driver/Transceiver > Non-Inverting Buffer/Driver
