Datasheet Texas Instruments SN74LVC00APWRE4
Manufacturer | Texas Instruments |
Series | SN74LVC00A |
Part Number | SN74LVC00APWRE4 |
Quadruple 2-Input Positive-NAND Gate 14-TSSOP -40 to 125
Datasheets
SNx4LVC00A Quadruple 2-Input Positive-NAND Gates datasheet
PDF, 1.4 Mb, Revision: R, File published: Feb 3, 2016
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Prices
Status
Lifecycle Status | Active (Recommended for new designs) |
Manufacture's Sample Availability | No |
Packaging
Pin | 14 |
Package Type | PW |
Industry STD Term | TSSOP |
JEDEC Code | R-PDSO-G |
Package QTY | 2000 |
Carrier | LARGE T&R |
Device Marking | LC00A |
Width (mm) | 4.4 |
Length (mm) | 5 |
Thickness (mm) | 1 |
Pitch (mm) | .65 |
Max Height (mm) | 1.2 |
Mechanical Data | Download |
Parametrics
Bits | 4 |
F @ Nom Voltage(Max) | 150 Mhz |
ICC @ Nom Voltage(Max) | 0.04 mA |
Operating Temperature Range | -40 to 125 C |
Output Drive (IOL/IOH)(Max) | 24/-24 mA |
Package Group | TSSOP |
Package Size: mm2:W x L | 14TSSOP: 32 mm2: 6.4 x 5(TSSOP) PKG |
Rating | Catalog |
Schmitt Trigger | No |
Technology Family | LVC |
VCC(Max) | 3.6 V |
VCC(Min) | 1.65 V |
Voltage(Nom) | 1.8,2.5,2.7,3.3 V |
tpd @ Nom Voltage(Max) | 12.5,6.4,5.1,4.3 ns |
Eco Plan
RoHS | Compliant |
Application Notes
- LVC Characterization InformationPDF, 114 Kb, File published: Dec 1, 1996
This document provides characterization information about low-voltage logic (LVL) that operates from a 3.3-V power supply. It addresses the issues of interfacing to 5-V logic ac performance power considerations input and output characteristics and signal integrity for this family of devices. - Use of the CMOS Unbuffered Inverter in Oscillator CircuitsPDF, 796 Kb, File published: Nov 6, 2003
CMOS devices have a high input impedance high gain and high bandwidth. These characteristics are similar to ideal amplifier characteristics and hence a CMOS buffer or inverter can be used in an oscillator circuit in conjunction with other passive components. Now CMOS oscillator circuits are widely used in high-speed applications because they are economical easy to use and take significantly - Power-Up 3-State (PU3S) Circuits in TI Standard Logic DevicesPDF, 209 Kb, File published: May 10, 2002
Many telecom and networking applications require that cards be inserted and extracted from a live backplane without interrupting data or damaging components. To achieve this interface terminals of the card must be electrically isolated from the bus system during insertion or extraction from the backplane. To facilitate this Texas Instruments provides bus-interface and logic devices with features
Model Line
Series: SN74LVC00A (22)
- SN74LVC00AD SN74LVC00ADBLE SN74LVC00ADBR SN74LVC00ADBRE4 SN74LVC00ADBRG4 SN74LVC00ADE4 SN74LVC00ADG4 SN74LVC00ADR SN74LVC00ADRE4 SN74LVC00ADRG4 SN74LVC00ADT SN74LVC00ANSR SN74LVC00ANSRG4 SN74LVC00APW SN74LVC00APWE4 SN74LVC00APWG4 SN74LVC00APWLE SN74LVC00APWR SN74LVC00APWRE4 SN74LVC00APWRG4 SN74LVC00APWT SN74LVC00ARGYR
Manufacturer's Classification
- Semiconductors > Logic > Gate > NAND Gate