Datasheet Texas Instruments 74ACT16244

ManufacturerTexas Instruments
Series74ACT16244
Datasheet Texas Instruments 74ACT16244

16-Bit Buffers/Line Drivers With 3-State Outputs

Datasheets

SN54ACT16244, 74ACT16244 datasheet
PDF, 747 Kb, Revision: B, File published: Apr 1, 1996
Extract from the document

Prices

Status

74ACT16244DGGR74ACT16244DGGRE474ACT16244DGGRG474ACT16244DL74ACT16244DLG474ACT16244DLR74ACT16244DLRG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoNoNoNo

Packaging

74ACT16244DGGR74ACT16244DGGRE474ACT16244DGGRG474ACT16244DL74ACT16244DLG474ACT16244DLR74ACT16244DLRG4
N1234567
Pin48484848484848
Package TypeDGGDGGDGGDLDLDLDL
Industry STD TermTSSOPTSSOPTSSOPSSOPSSOPSSOPSSOP
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY200020002000252510001000
CarrierLARGE T&RLARGE T&RLARGE T&RTUBETUBELARGE T&RLARGE T&R
Device MarkingACT16244ACT16244ACT16244ACT16244ACT16244ACT16244ACT16244
Width (mm)6.16.16.17.497.497.497.49
Length (mm)12.512.512.515.8815.8815.8815.88
Thickness (mm)1.151.151.152.592.592.592.59
Pitch (mm).5.5.5.635.635.635.635
Max Height (mm)1.21.21.22.792.792.792.79
Mechanical DataDownloadDownloadDownloadDownloadDownloadDownloadDownload

Parametrics

Parameters / Models74ACT16244DGGR
74ACT16244DGGR
74ACT16244DGGRE4
74ACT16244DGGRE4
74ACT16244DGGRG4
74ACT16244DGGRG4
74ACT16244DL
74ACT16244DL
74ACT16244DLG4
74ACT16244DLG4
74ACT16244DLR
74ACT16244DLR
74ACT16244DLRG4
74ACT16244DLRG4
Bits16161616161616
F @ Nom Voltage(Max), Mhz90909090909090
ICC @ Nom Voltage(Max), mA0.080.080.080.080.080.080.08
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Output Drive (IOL/IOH)(Max), mA-24/24-24/24-24/24-24/24-24/24-24/24-24/24
Package GroupTSSOPTSSOPTSSOPSSOPSSOPSSOPSSOP
Package Size: mm2:W x L, PKG48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48TSSOP: 101 mm2: 8.1 x 12.5(TSSOP)48SSOP: 164 mm2: 10.35 x 15.88(SSOP)48SSOP: 164 mm2: 10.35 x 15.88(SSOP)48SSOP: 164 mm2: 10.35 x 15.88(SSOP)48SSOP: 164 mm2: 10.35 x 15.88(SSOP)
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNoNo
Technology FamilyACTACTACTACTACTACTACT
VCC(Max), V5.55.55.55.55.55.55.5
VCC(Min), V4.54.54.54.54.54.54.5
Voltage(Nom), V5555555
tpd @ Nom Voltage(Max), ns9.59.59.59.59.59.59.5

Eco Plan

74ACT16244DGGR74ACT16244DGGRE474ACT16244DGGRG474ACT16244DL74ACT16244DLG474ACT16244DLR74ACT16244DLRG4
RoHSCompliantCompliantCompliantCompliantCompliantCompliantCompliant

Application Notes

  • Selecting the Right Level Translation Solution (Rev. A)
    PDF, 313 Kb, Revision: A, File published: Jun 22, 2004
    Supply voltages continue to migrate to lower nodes to support today's low-power high-performance applications. While some devices are capable of running at lower supply nodes others might not have this capability. To haveswitching compatibility between these devices the output of each driver must be compliant with the input of the receiver that it is driving. There are several level-translati
  • Introduction to Logic
    PDF, 93 Kb, File published: Apr 30, 2015
  • Implications of Slow or Floating CMOS Inputs (Rev. D)
    PDF, 260 Kb, Revision: D, File published: Jun 23, 2016
  • TI IBIS File Creation Validation and Distribution Processes
    PDF, 380 Kb, File published: Aug 29, 2002
    The Input/Output Buffer Information Specification (IBIS) also known as ANSI/EIA-656 has become widely accepted among electronic design automation (EDA) vendors semiconductor vendors and system designers as the format for digital electrical interface data. Because IBIS models do not reveal proprietary internal processes or architectural information semiconductor vendors? support for IBIS con
  • CMOS Power Consumption and CPD Calculation (Rev. B)
    PDF, 89 Kb, Revision: B, File published: Jun 1, 1997
    Reduction of power consumption makes a device more reliable. The need for devices that consume a minimum amount of power was a major driving force behind the development of CMOS technologies. As a result CMOS devices are best known for low power consumption. However for minimizing the power requirements of a board or a system simply knowing that CMOS devices may use less power than equivale
  • Designing With Logic (Rev. C)
    PDF, 186 Kb, Revision: C, File published: Jun 1, 1997
    Data sheets which usually give information on device behavior only under recommended operating conditions may only partially answer engineering questions that arise during the development of systems using logic devices. However information is frequently needed regarding the behavior of the device outside the conditions in the data sheet. Such questions might be:?How does a bus driver behave w
  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Kb, File published: Apr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

Model Line

Manufacturer's Classification

  • Semiconductors> Logic> Buffer/Driver/Transceiver> Non-Inverting Buffer/Driver