Datasheet Texas Instruments ADS5444-EP
| Manufacturer | Texas Instruments |
| Series | ADS5444-EP |
Enhanced Product 13-Bit 250-Msps Analog-To-Digital Converter
Datasheets
Prices
Status
| ADS5444MPFPEP | V62/06668-01XE | |
|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | No |
Packaging
| ADS5444MPFPEP | V62/06668-01XE | |
|---|---|---|
| N | 1 | 2 |
| Pin | 80 | 80 |
| Package Type | PFP | PFP |
| Industry STD Term | HTQFP | HTQFP |
| JEDEC Code | S-PQFP-G | S-PQFP-G |
| Package QTY | 96 | 96 |
| Carrier | JEDEC TRAY (10+1) | JEDEC TRAY (10+1) |
| Device Marking | ADS5444M-EP | ADS5444M-EP |
| Width (mm) | 12 | 12 |
| Length (mm) | 12 | 12 |
| Thickness (mm) | 1 | 1 |
| Pitch (mm) | .5 | .5 |
| Max Height (mm) | 1.2 | 1.2 |
| Mechanical Data | Download | Download |
Parametrics
| Parameters / Models | ADS5444MPFPEP | V62/06668-01XE |
|---|---|---|
| # Input Channels | 1 | 1 |
| Analog Voltage AVDD(Max), V | 5.25 | 5.25 |
| Analog Voltage AVDD(Min), V | 4.75 | 4.75 |
| Architecture | Pipeline | Pipeline |
| Digital Supply(Max), V | 3.6 | 3.6 |
| Digital Supply(Min), V | 3 | 3 |
| ENOB, Bits | 11.2 | 11.2 |
| INL(Max), +/-LSB | 4.3 | 4.3 |
| INL(Typ), +/-LSB | 0.9 | 0.9 |
| Interface | Parallel LVDS | Parallel LVDS |
| Operating Temperature Range, C | -55 to 125 | -55 to 125 |
| Package Group | HTQFP | HTQFP |
| Package Size: mm2:W x L, PKG | 80HTQFP: 196 mm2: 14 x 14(HTQFP) | 80HTQFP: 196 mm2: 14 x 14(HTQFP) |
| Power Consumption(Typ), mW | 2250 | 2250 |
| Rating | HiRel Enhanced Product | HiRel Enhanced Product |
| Reference Mode | Int | Int |
| Resolution, Bits | 13 | 13 |
| SFDR, dB | 85 | 85 |
| SNR, dB | 69 | 69 |
| Sample Rate (max), SPS | 250MSPS | 250MSPS |
Eco Plan
| ADS5444MPFPEP | V62/06668-01XE | |
|---|---|---|
| RoHS | Compliant | Compliant |
Application Notes
- Driving High-Speed ADCs: Circuit Topologies and System-Level Parameters (Rev. A)PDF, 327 Kb, Revision: A, File published: Sep 10, 2010
This application report discusses the performance-related aspects of passive and active interfaces at the analog input of high-speed pipeline analog-to-digital converters (ADCs). The report simplifies the many possibilities into two main categories: passive and active interface circuits. The first section of the report gives an overview of equivalent models of buffered and unbuffered ADC input cir - CDCE72010 as a Clocking Solution for High-Speed Analog-to-Digital ConvertersPDF, 424 Kb, File published: Jun 8, 2008
Texas Instruments has recently introduced a family of devices suitable to meet the demands of high-speed high-IF sampling analog-to-digital converters (ADCs) such as the ADS5483 which is capable of sampling up to 135 MSPS. To realize the full potential of these high-performance devices the system must provide an extremely low phase noise clock source. The CDCE72010 clock synthesizer chip offers - Phase Noise Performance and Jitter Cleaning Ability of CDCE72010PDF, 2.3 Mb, File published: Jun 2, 2008
This application report presents phase noise data taken on the CDCE72010 jitter cleaner and synchronizer PLL device. The phase noise performance of the CDCE72010 depends on the phase noise of the reference clock VCXO clock and the CDCE72010 itself. This application report shows the phase noise performance at several of the most popular CDMA frequencies. This data helps the user to choose the rig - High-Speed Analog-to-Digital Converter BasicsPDF, 1.1 Mb, File published: Jan 11, 2012
The goal of this document is to introduce a wide range of theories and topics that are relevant tohigh-speed analog-to-digital converters (ADC). This document provides details on sampling theorydata-sheet specifications ADC selection criteria and evaluation methods clock jitter and other commonsystem-level concerns. In addition some end-users will want to extend the performance capabil - Smart Selection of ADC/DAC Enables Better Design of Software-Defined RadioPDF, 376 Kb, File published: Apr 28, 2009
This application report explains different aspects of selecting analog-to-digital and digital-to-analog data converters for Software-Defined Radio (SDR) applications. It also explains how ADS61xx ADCs and the DAC5688 from Texas Instruments fit properly for SDR designs. - Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)PDF, 69 Kb, Revision: A, File published: May 18, 2015
- A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)PDF, 425 Kb, Revision: B, File published: Oct 9, 2011
This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference. - Principles of Data Acquisition and Conversion (Rev. A)PDF, 132 Kb, Revision: A, File published: Apr 16, 2015
Model Line
Series: ADS5444-EP (2)
Manufacturer's Classification
- Semiconductors> Space & High Reliability> Data Converter> Analog to Digital Converters
