Datasheet Texas Instruments ADS58C23IPFP
| Manufacturer | Texas Instruments |
| Series | ADS58C23 |
| Part Number | ADS58C23IPFP |
Dual Channel IF BTS Receiver with Signal Processing for multi-mode 3G+LTE 80-HTQFP -40 to 85
Datasheets
ADS58C20 and ADS58C23 Features datasheet
PDF, 695 Kb, File published: Jun 30, 2011
Extract from the document
Prices
Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 80 |
| Package Type | PFP |
| Industry STD Term | HTQFP |
| JEDEC Code | S-PQFP-G |
| Package QTY | 96 |
| Carrier | JEDEC TRAY (10+1) |
| Device Marking | ADS58C23I |
| Width (mm) | 12 |
| Length (mm) | 12 |
| Thickness (mm) | 1 |
| Pitch (mm) | .5 |
| Max Height (mm) | 1.2 |
| Mechanical Data | Download |
Parametrics
| # Input Channels | 2 |
| Analog Input BW | 750 MHz |
| Analog Voltage AVDD(Max) | 3.45 V |
| Analog Voltage AVDD(Min) | 3.15 V |
| Interface | Parallel LVDS |
| Logic Voltage DV/DD(Max) | 2.0 V |
| Logic Voltage DV/DD(Min) | 1.7 V |
| Operating Temperature Range | -40 to 85 C |
| Package Group | HTQFP |
| Package Size: mm2:W x L | 80HTQFP: 196 mm2: 14 x 14(HTQFP) PKG |
| Power Consumption(Typ) | 1630 mW |
| Resolution | 14 Bits |
| SFDR(Typ) | 94 dB |
| SNR(Typ) | 75 dB |
| Sample Rate(Max) | 250 MSPS |
| Special Features | Decimating Filter,Differential Inputs,Nap Mode,Out of Range Indicator,Power Down |
Eco Plan
| RoHS | Compliant |
Application Notes
- High-Speed Analog-to-Digital Converter BasicsPDF, 1.1 Mb, File published: Jan 11, 2012
The goal of this document is to introduce a wide range of theories and topics that are relevant tohigh-speed analog-to-digital converters (ADC). This document provides details on sampling theorydata-sheet specifications ADC selection criteria and evaluation methods clock jitter and other commonsystem-level concerns. In addition some end-users will want to extend the performance capabil - Band-Pass Filter Design Techniques for High-Speed ADCsPDF, 733 Kb, File published: Feb 27, 2012
Several well-known methods exist for designing passive inductor-capacitor (LC) filters with resistive load terminations. However, when LC filters are used to drive the analog input pins of a high-speed analog-to-digital converter (ADC), special consideration must be given to the ADC input impedance. Not accounting for the ADC input impedance often results in a filter design that does not meet the - Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)PDF, 69 Kb, Revision: A, File published: May 18, 2015
- A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)PDF, 425 Kb, Revision: B, File published: Oct 9, 2011
This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference. - Principles of Data Acquisition and Conversion (Rev. A)PDF, 132 Kb, Revision: A, File published: Apr 16, 2015
Model Line
Series: ADS58C23 (2)
- ADS58C23IPFP ADS58C23IPFPR
Manufacturer's Classification
- Semiconductors > RF & Microwave > Wideband Receivers
