Datasheet Texas Instruments ADS62P19
| Manufacturer | Texas Instruments |
| Series | ADS62P19 |
Dual-Channel, 11-Bit, 250-MSPS Analog-to-Digital Converter (ADC)
Datasheets
Dual-Channel, 11-Bit, 250-MSPS ADC With DDR LVDS and Parallel CMOS Outputs datasheet
PDF, 2.1 Mb, File published: Apr 30, 2013
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Status
| ADS62P19IRGCR | ADS62P19IRGCT | |
|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | Yes |
Packaging
| ADS62P19IRGCR | ADS62P19IRGCT | |
|---|---|---|
| N | 1 | 2 |
| Pin | 64 | 64 |
| Package Type | RGC | RGC |
| Industry STD Term | VQFN | VQFN |
| JEDEC Code | S-PQFP-N | S-PQFP-N |
| Package QTY | 2000 | 250 |
| Carrier | LARGE T&R | SMALL T&R |
| Device Marking | AZ62P19 | AZ62P19 |
| Width (mm) | 9 | 9 |
| Length (mm) | 9 | 9 |
| Thickness (mm) | .88 | .88 |
| Pitch (mm) | .5 | .5 |
| Max Height (mm) | 1 | 1 |
| Mechanical Data | Download | Download |
Parametrics
| Parameters / Models | ADS62P19IRGCR | ADS62P19IRGCT |
|---|---|---|
| # Input Channels | 2 | 2 |
| Analog Input BW, MHz | 800 | 800 |
| Architecture | Pipeline | Pipeline |
| DNL(Typ), +/-LSB | 0.1 | 0.1 |
| ENOB, Bits | 10.6 | 10.6 |
| INL(Max), +/-LSB | 2.5 | 2.5 |
| INL(Typ), +/-LSB | 0.5 | 0.5 |
| Input Buffer | No | No |
| Input Range, Vp-p | 2 | 2 |
| Interface | DDR LVDS,Parallel CMOS | DDR LVDS,Parallel CMOS |
| Operating Temperature Range, C | -40 to 85 | -40 to 85 |
| Package Group | VQFN | VQFN |
| Package Size: mm2:W x L, PKG | 64VQFN: 81 mm2: 9 x 9(VQFN) | 64VQFN: 81 mm2: 9 x 9(VQFN) |
| Power Consumption(Typ), mW | 1250 | 1250 |
| Rating | Catalog | Catalog |
| Reference Mode | Ext,Int | Ext,Int |
| Resolution, Bits | 11 | 11 |
| SFDR, dB | 88 | 88 |
| SINAD, dB | 65.3 | 65.3 |
| SNR, dB | 65.9 | 65.9 |
| Sample Rate(Max), MSPS | 250 | 250 |
Eco Plan
| ADS62P19IRGCR | ADS62P19IRGCT | |
|---|---|---|
| RoHS | Compliant | Compliant |
Application Notes
- Why Use Oversampling when Undersampling Can Do the Job? (Rev. A)PDF, 1.2 Mb, Revision: A, File published: Jul 19, 2013
- Design Considerations for Avoiding Timing Errors during High-Speed ADC, LVDS Dat (Rev. A)PDF, 2.0 Mb, Revision: A, File published: May 22, 2015
- Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)PDF, 69 Kb, Revision: A, File published: May 18, 2015
- A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)PDF, 425 Kb, Revision: B, File published: Oct 9, 2011
This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference. - Principles of Data Acquisition and Conversion (Rev. A)PDF, 132 Kb, Revision: A, File published: Apr 16, 2015
Model Line
Series: ADS62P19 (2)
Manufacturer's Classification
- Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> High Speed ADCs (>10MSPS)
