Datasheet Texas Instruments ADS7825
Manufacturer | Texas Instruments |
Series | ADS7825 |
4 Channel, 16-Bit Sampling CMOS A/D Converter
Datasheets
4 Channel, 16-Bit Sampling CMOS A/D Converter datasheet
PDF, 422 Kb, File published: Sep 27, 2000
Extract from the document
Prices
Status
ADS7825U | ADS7825U/1K | ADS7825UB | ADS7825UB/1K | ADS7825UBG4 | ADS7825UE4 | ADS7825UG4 | |
---|---|---|---|---|---|---|---|
Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
Manufacture's Sample Availability | No | No | Yes | No | No | No | No |
Packaging
ADS7825U | ADS7825U/1K | ADS7825UB | ADS7825UB/1K | ADS7825UBG4 | ADS7825UE4 | ADS7825UG4 | |
---|---|---|---|---|---|---|---|
N | 1 | 2 | 3 | 4 | 5 | 6 | 7 |
Pin | 28 | 28 | 28 | 28 | 28 | 28 | 28 |
Package Type | DW | DW | DW | DW | DW | DW | DW |
Industry STD Term | SOIC | SOIC | SOIC | SOIC | SOIC | SOIC | SOIC |
JEDEC Code | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
Package QTY | 20 | 1000 | 20 | 1000 | 20 | 20 | 20 |
Carrier | TUBE | LARGE T&R | TUBE | LARGE T&R | TUBE | TUBE | TUBE |
Device Marking | ADS7825U | ADS7825U | B | ADS7825U | ADS7825U | ADS7825U | ADS7825U |
Width (mm) | 7.5 | 7.5 | 7.5 | 7.5 | 7.5 | 7.5 | 7.5 |
Length (mm) | 17.9 | 17.9 | 17.9 | 17.9 | 17.9 | 17.9 | 17.9 |
Thickness (mm) | 2.35 | 2.35 | 2.35 | 2.35 | 2.35 | 2.35 | 2.35 |
Pitch (mm) | 1.27 | 1.27 | 1.27 | 1.27 | 1.27 | 1.27 | 1.27 |
Max Height (mm) | 2.65 | 2.65 | 2.65 | 2.65 | 2.65 | 2.65 | 2.65 |
Mechanical Data | Download | Download | Download | Download | Download | Download | Download |
Parametrics
Parameters / Models | ADS7825U | ADS7825U/1K | ADS7825UB | ADS7825UB/1K | ADS7825UBG4 | ADS7825UE4 | ADS7825UG4 |
---|---|---|---|---|---|---|---|
# Input Channels | 4 | 4 | 4 | 4 | 4 | 4 | 4 |
Analog Voltage AVDD(Max), V | 5.25 | 5.25 | 5.25 | 5.25 | 5.25 | 5.25 | 5.25 |
Analog Voltage AVDD(Min), V | 4.75 | 4.75 | 4.75 | 4.75 | 4.75 | 4.75 | 4.75 |
Architecture | SAR | SAR | SAR | SAR | SAR | SAR | SAR |
Digital Supply(Max), V | 5.25 | 5.25 | 5.25 | 5.25 | 5.25 | 5.25 | 5.25 |
Digital Supply(Min), V | 4.75 | 4.75 | 4.75 | 4.75 | 4.75 | 4.75 | 4.75 |
INL(Max), +/-LSB | 2 | 2 | 2 | 2 | 2 | 2 | 2 |
Input Range(Max), V | 10 | 10 | 10 | 10 | 10 | 10 | 10 |
Input Range(Min), V | -10 | -10 | -10 | -10 | -10 | -10 | -10 |
Input Type | Single-Ended | Single-Ended | Single-Ended | Single-Ended | Single-Ended | Single-Ended | Single-Ended |
Integrated Features | Over-Voltage Protection | Over-Voltage Protection | Over-Voltage Protection | Over-Voltage Protection | Over-Voltage Protection | Over-Voltage Protection | Over-Voltage Protection |
Interface | Parallel,Serial | Parallel,Serial | Parallel,Serial | Parallel,Serial | Parallel,Serial | Parallel,Serial | Parallel,Serial |
Multi-Channel Configuration | Multiplexed | Multiplexed | Multiplexed | Multiplexed | Multiplexed | Multiplexed | Multiplexed |
Operating Temperature Range, C | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 | -40 to 85 |
Package Group | SOIC | SOIC | SOIC | SOIC | SOIC | SOIC | SOIC |
Package Size: mm2:W x L, PKG | 28SOIC: 184 mm2: 10.3 x 17.9(SOIC) | 28SOIC: 184 mm2: 10.3 x 17.9(SOIC) | 28SOIC: 184 mm2: 10.3 x 17.9(SOIC) | 28SOIC: 184 mm2: 10.3 x 17.9(SOIC) | 28SOIC: 184 mm2: 10.3 x 17.9(SOIC) | 28SOIC: 184 mm2: 10.3 x 17.9(SOIC) | 28SOIC: 184 mm2: 10.3 x 17.9(SOIC) |
Power Consumption(Typ), mW | 50 | 50 | 50 | 50 | 50 | 50 | 50 |
Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
Reference Mode | Ext,Int | Ext,Int | Ext,Int | Ext,Int | Ext,Int | Ext,Int | Ext,Int |
Resolution, Bits | 16 | 16 | 16 | 16 | 16 | 16 | 16 |
SINAD, dB | 86 | 86 | 86 | 86 | 86 | 86 | 86 |
SNR, dB | 86 | 86 | 86 | 86 | 86 | 86 | 86 |
Sample Rate (max), SPS | 40kSPS | 40kSPS | 40kSPS | 40kSPS | 40kSPS | 40kSPS | 40kSPS |
Sample Rate(Max), MSPS | 0.04 | 0.04 | 0.04 | 0.04 | 0.04 | 0.04 | 0.04 |
THD(Typ), dB | -90 | -90 | -90 | -90 | -90 | -90 | -90 |
Eco Plan
ADS7825U | ADS7825U/1K | ADS7825UB | ADS7825UB/1K | ADS7825UBG4 | ADS7825UE4 | ADS7825UG4 | |
---|---|---|---|---|---|---|---|
RoHS | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
Application Notes
- Analog-to-Digital Converter Grounding Practices Affect System Performance (Rev. A)PDF, 69 Kb, Revision: A, File published: May 18, 2015
- A Glossary of Analog-to-Digital Specifications and Performance Characteristics (Rev. B)PDF, 425 Kb, Revision: B, File published: Oct 9, 2011
This glossary is a collection of the definitions of Texas Instruments' Delta-Sigma (О”ОЈ), successive approximation register (SAR), and pipeline analog-to-digital (A/D) converter specifications and performance characteristics. Although there is a considerable amount of detail in this document, the product data sheet for a particular product specification is the best and final reference. - Using the Continuos Parallel Mode with the ADS7824 and ADS7825PDF, 57 Kb, File published: Sep 27, 2000
The ADS7824 and ADS7825 are 12-bit and 16-bit converters that have a four channel multiplexed front end. The channel selection on the analog input of these converters is programmable by way of the pins on the devices, A0 and A1. This feature provides the most flexibility by allowing the user to change to the preferred input channel on the fly. Additionally, the input channels can be cycled by util - Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)PDF, 227 Kb, Revision: A, File published: Nov 10, 2010
This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different - Principles of Data Acquisition and Conversion (Rev. A)PDF, 132 Kb, Revision: A, File published: Apr 16, 2015
- Determining Minimum Acquisition Times for SAR ADCs, part 2PDF, 215 Kb, File published: Mar 17, 2011
The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to - ADS7809 Tag FeaturesPDF, 50 Kb, File published: Sep 27, 2000
The ADS7809 is part of a family of capacitive redistribution SAR A/D converters that feature a serial output and a tag pin for cascading multiple converters. Other members of this family include the ADS7806, ADS7807, ADS7808, ADS7824, and ADS7825. Note that the even numbered converters are 12-bit converters and the odd numbered converters are 16-bit converters.
Model Line
Series: ADS7825 (7)
Manufacturer's Classification
- Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)