Datasheet Texas Instruments ADS8412

Manufacturer	Texas Instruments
Series	ADS8412

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Parametrics

Parameters / Models	ADS8412IBPFBR	ADS8412IBPFBT	ADS8412IBPFBTG4	ADS8412IPFBT
# Input Channels	1	1	1	1
Analog Voltage AVDD(Max), V	5.25	5.25	5.25	5.25
Analog Voltage AVDD(Min), V	4.75	4.75	4.75	4.75
Architecture	SAR	SAR	SAR	SAR
Digital Supply(Max), V	5.25	5.25	5.25	5.25
Digital Supply(Min), V	2.7	2.7	2.7	2.7
INL(Max), +/-LSB	2.5	2.5	2.5	2.5
Input Range(Max), V	4.2	4.2	4.2	4.2
Input Range(Min), V	4.2	4.2	4.2	4.2
Input Type	Differential	Differential	Differential	Differential
Integrated Features	Oscillator	Oscillator	Oscillator	Oscillator
Interface	Parallel	Parallel	Parallel	Parallel
Multi-Channel Configuration	N/A	N/A	N/A	N/A
Operating Temperature Range, C	-40 to 85	-40 to 85	-40 to 85	-40 to 85
Package Group	TQFP	TQFP	TQFP	TQFP
Package Size: mm2:W x L, PKG	48TQFP: 81 mm2: 9 x 9(TQFP)	48TQFP: 81 mm2: 9 x 9(TQFP)	48TQFP: 81 mm2: 9 x 9(TQFP)	48TQFP: 81 mm2: 9 x 9(TQFP)
Power Consumption(Typ), mW	155	155	155	155
Rating	Catalog	Catalog	Catalog	Catalog
Reference Mode	Ext,Int	Ext,Int	Ext,Int	Ext,Int
Resolution, Bits	16	16	16	16
SINAD, dB	88	88	88	88
SNR, dB	90	90	90	90
Sample Rate (max), SPS	2MSPS	2MSPS	2MSPS	2MSPS
Sample Rate(Max), MSPS	2	2	2	2
THD(Typ), dB	-95	-95	-95	-95

Eco Plan

Application Notes

• Download
  Using ADS8411/2 (16-Bit 2MSPS SAR) as a Serial ADC
  PDF, 438 Kb, File published: May 24, 2004
  This application report discusses how to use a parallel ADC as a serial ADC by using a low-cost CPLD. This concept is tested with a Texas Instruments ADS8411/12 (16-bit, 2 MSPS SAR ADC) and an Altera(TM) MAX 3000A CPLD. A full solution with a schematic, layout, and software for programming the CPLD is presented at the end of the report.
• Download
  Interfacing the ADS8402/ADS8412 to TMS320C6713 DSP
  PDF, 262 Kb, File published: Sep 23, 2004
  This application report presents a solution for interfacing the ADS8402 and ADS8412 16-bit, parallel interface converters to the TMS320C6713 DSP. The hardware solution consists of existing and orderable hardware, specifically the ADS8402EVM, 'C6713 DSK, and 5-6K interface board. The software demonstrates how to use the EDMA controller to efficiently collect data from the data converter. Discussed
• Download
  Determining Minimum Acquisition Times for SAR ADCs, part 1 (Rev. A)
  PDF, 227 Kb, Revision: A, File published: Nov 10, 2010
  This application report analyzes a simple method for calculating minimum acquisition times for successive-approximation register analog-to-digital converters (SAR ADCs). The input structure of the ADC is examined along with the driving circuit. The voltage on the sampling capacitor is then determined for the case when a step function is applied to the input of the driving circuit. Three different
• Download
  Determining Minimum Acquisition Times for SAR ADCs, part 2
  PDF, 215 Kb, File published: Mar 17, 2011
  The input structure circuit of a successive-approximation register analog-to-digital converter (SAR ADC) incombination with the driving circuit forms a transfer function that can be used to determine minimum acquisition times for different types of applied input signals. This application report, which builds on Determining Minimum Acquisition Times for SAR ADCs When a Step Function is Applied to

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Manufacturer's Classification

• Semiconductors> Data Converters> Analog-to-Digital Converters (ADCs)> Precision ADCs (<=10MSPS)