Datasheet Texas Instruments AM1808BZCE3

ManufacturerTexas Instruments
SeriesAM1808
Part NumberAM1808BZCE3
Datasheet Texas Instruments AM1808BZCE3

Sitara Processor: ARM9, LPDDR, DDR2, Display, Ethernet 361-NFBGA 0 to 90

Datasheets

AM1808 ARM Microprocessor datasheet
PDF, 1.9 Mb, Revision: E, File published: Mar 21, 2014
Extract from the document

Prices

Status

Lifecycle StatusObsolete (Manufacturer has discontinued the production of the device)
Manufacture's Sample AvailabilityNo

Packaging

Pin361361361
Package TypeZCEZCEZCE
Industry STD TermNFBGANFBGANFBGA
JEDEC CodeS-PBGA-NS-PBGA-NS-PBGA-N
Device MarkingAM1808B375ZCE
Width (mm)131313
Length (mm)131313
Thickness (mm).89.89.89
Pitch (mm).65.65.65
Max Height (mm)1.31.31.3
Mechanical DataDownloadDownloadDownload

Parametrics

ARM CPU1 ARM9
ARM MHz375,456 Max.
ApplicationsAutomotive,Communications Equipment,Enterprise Systems,Industrial,Personal Electronics
DRAMDDR2,LPDDR
Display OptionsLCD
EMAC10/100
I2C2
On-Chip L2 Cache128 KB (ARM9)
Operating SystemsAndroid,Integrity,Linux,Neutrino,VxWorks,Windows Embedded CE
Operating Temperature Range0 to 90,-40 to 105,-40 to 90 C
RatingCatalog
SPI2
UART3 SCI
USB2

Eco Plan

RoHSNot Compliant

Design Kits & Evaluation Modules

  • JTAG Emulators/ Analyzers: TMDSEMU200-U
    XDS200 USB Debug Probe
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: TMDXEVMWIFI1808L
    AM18x evaluation module with Wi-Fi
    Lifecycle Status: Active (Recommended for new designs)
  • Development Kits: TMDXLCDK138
    OMAP-L138 Development Kit (LCDK)
    Lifecycle Status: Obsolete (Manufacturer has discontinued the production of the device)
  • Development Kits: TMDXLCDK6748
    TMS320C6748 DSP Development Kit (LCDK)
    Lifecycle Status: Obsolete (Manufacturer has discontinued the production of the device)
  • JTAG Emulators/ Analyzers: TMDSEMU560V2STM-UE
    XDS560v2 System Trace USB & Ethernet Debug Probe
    Lifecycle Status: Active (Recommended for new designs)
  • JTAG Emulators/ Analyzers: TMDSEMU560V2STM-U
    XDS560v2 System Trace USB Debug Probe
    Lifecycle Status: Active (Recommended for new designs)
  • Evaluation Modules & Boards: TMDSEXP1808L
    AM18x eXperimenter's Kit
    Lifecycle Status: Active (Recommended for new designs)

Application Notes

  • Getting Started With the AM18x EVM or eXperimenter’s Kit
    PDF, 20 Kb, File published: Mar 30, 2010
  • Running the Metrology Demo on the SGI EVM
    PDF, 28 Kb, File published: Jun 27, 2012
    The Metrology Demo showcases the ability of the dual-core OMAP-L138 DSP+ARM processor to execute metrology functions, power analytics algorithms (FFT), and a Rogowski coil digital integrator on its TMS320C674x DSP, while at the same time running a high-level operating system (Linux) with network communication on its ARM9в„ў core. A Windows PC graphical user interface (GUI) is used to display t
  • SGI EVM Software Manual
    PDF, 28 Kb, File published: Jun 27, 2012
    This article will guide you in the basic setup of the file system and Linux kernel for the Smart Grid Infrastructure (SGI) EVM. It also provides information on modifying and rebuilding the Linux kernel for your application.The SGI platform is designed for development and test of smart grid applications including: data concentrator, power protection and monitoring, power analytics, industria
  • Powering the AM1806, AM1808, and AM1810 with the TPS650061
    PDF, 461 Kb, File published: Sep 6, 2011
  • AM18xx Pin Multiplexing Utility (Rev. A)
    PDF, 32 Kb, Revision: A, File published: Dec 6, 2011
    The AM18xx devices use a great deal of internal pin multiplexing to allow the most functionality in the smallest and lowest cost package. This software allows the pin multiplexing registers of the device to be calculated with ease, as well as showing what peripherals can be used together and what devices support the peripherals that are selected. This software is useful to anyone creating a system
  • Using the AM18xx Bootloader (Rev. C)
    PDF, 1.6 Mb, Revision: C, File published: Jan 23, 2014
    This application report describes various boot mechanisms supported by the AM18xx bootloader read-only memory (ROM) image. Topics covered include the Application Image Script (AIS) boot process, an AISgen tool used to generate boot scripts, protocol for booting the device from an external master device, a UART Boot Host GUI for booting the device from a host PC, and any limitations, default settin
  • AM18x Power Consumption Summary
    PDF, 19 Kb, File published: Aug 30, 2010
    This article discusses the power consumption of the Texas Instruments AM18x. Power consumption on the AM18x devices are highly application-dependent. The low-core voltage and other power design optimizations allow these devices to operate with industry-leading performance, while maintaining a low power-to-performance ratio.The power data presented in this document are based on measured data w
  • WiLink 6.0 (WL1271) OpenLink Platform (Rev. A)
    PDF, 735 Kb, Revision: A, File published: Apr 26, 2011
  • OMAP-L1x8 Complementary Products
    PDF, 26 Kb, File published: Jul 20, 2009
    This article has been contributed to the TI DaVinciв„ў and OMAPв„ў Developer Wiki. To see the most recently updated version or to contribute, visit this topic at:http://tiexpressdsp.com/index.php/OMAP-L1x8_Complementary_Products .This Wiki article serves as a repository of complimentary devices that ca
  • OMAP-L13x/AM1x Linux PSP Overview
  • Powering OMAP-L132/L138, C6742/4/6, and AM18x with TPS65070 (Rev. B)
    PDF, 453 Kb, Revision: B, File published: Aug 29, 2011
    This documents details the design consideration of a power management unit (PMU) solution for the OMAP-L132/-L138 low-power applications processors with a TPS65070 five-channel power management device.
  • High-Vin, High-Efficiency Power Solution Using DC/DC Converter With DVFS (Rev. C)
    PDF, 266 Kb, Revision: C, File published: Aug 29, 2011
    This reference design is intended for users designing with the TMS320C6742, TMS320C6746, TMS320C6748, or OMAP-L132/L138 processor. Using sequenced power supplies, this reference design describes a system having a 12-V input voltage and a high-efficiency dc/dc converter with integrated FETs and dynamic voltage and frequency scaling (DVFS) for a small, simple design.Sequenced power supply architec
  • Medium Integrated Power Solution Using a Dual DC/DC Converter and an LDO (Rev. B)
    PDF, 387 Kb, Revision: B, File published: Aug 29, 2011
    This reference design is intended for users designing with the TMS320C6742, TMS320C6746, TMS320C6748, or OMAP-L132/L138 processor. Using sequenced power supplies, this reference design describes a system having a 3.3-V input voltage and a high-efficiency dc/dc converter with integrated FETs for a small, simple design.Sequenced power supply architectures are becoming commonplace in high-performan
  • Simple Power Solution Using LDOs (Rev. B)
    PDF, 150 Kb, Revision: B, File published: Aug 29, 2011
    This reference design helps those desiring to design-in the TMS320C6742, TMS320C6746, TMS320C6748, and OMAP-L132/L138. This design, employing sequenced power supplies, describes asystem with an input voltage of 3.3 V, and uses LDOs for a small, simple system.Sequenced power supply architectures are becoming commonplace in high-performance microprocessor and digital signal processor (DSP) syste
  • High-Efficiency Power Solution Using DC/DC Converters With DVFS (Rev. A)
    PDF, 161 Kb, Revision: A, File published: May 5, 2010
    This reference design is intended for users designing with the TMS320C6742, TMS320C6746, TMS320C6748, OMAP-L138 or AM18x processor. Using sequenced power supplies, this reference design describes a system having a 12-V input voltage and a high-efficiency dc/dc converter with ntegrated FETs and dynamic voltage and frequency scaling (DVFS) for a small, simple design.Sequenced power supply archit
  • TMS320C6748/46/42 & OMAP-L1x8 USB Upstream Device Compliance Testing
    PDF, 1.1 Mb, File published: Aug 17, 2009
    This application report describes the TMS320C6748/46/42 and OMAP-L1x8 electrical compliance of a high-speed (HS) universal serial bus (USB) operation conforming to the USB 2.0 specification. The on-the-go (OTG) controller supports the USB 2.0 device and host mode at high-speed (HS), full-speed (FS) and low-speed (LS).
  • TMS320C6748/46/42 & OMAP-L132/L138 USB Downstream Host Compliance Testing
    PDF, 3.6 Mb, File published: Aug 17, 2009
    This application report describes the TMS320C6748/46/42 and OMAP-L1x8 embedded Host electrical compliance of a high-speed (HS) universal serial bus (USB) operation conforming to the USB 2.0 specification. The OTG controller supports the USB 2.0 device and host mode at high-speed (HS), full-speed (FS) and low-speed (LS).
  • High-Integration, High-Efficiency Power Solution Using DC/DC Converters w/DVFS (Rev. A)
    PDF, 208 Kb, Revision: A, File published: May 5, 2010
    This reference design is intended for users designing with the TMS320C6742, TMS320C6746, TMS320C6748, OMAP-L138 or AM18x processor. Using sequenced power supplies, this reference design describes a system having a 12-V input voltage and a high-efficiency dc/dc converter with ntegrated FETs and dynamic voltage and frequency scaling (DVFS) for a small, simple design.Sequenced power supply archit
  • TMS320C674x/OMAP-L1x USB Compliance Checklist
    PDF, 89 Kb, File published: Mar 12, 2009
    This application report contains the USB checklist for the TMS320C674x/OMAP-L1x (C674x/OMAP-L1x). The C674x/OMAP-L1x has a compliant full-speed USB device port and does not support a low-speed USB device operation.
  • OMAP-L1x/C674x/AM1x SOC Architecture and Throughput Overview
    PDF, 19 Kb, File published: Feb 12, 2010
    This article has been contributed to the TI Developer Wiki. To see the most recently updated version or to contribute, visit this topic at:http://wiki.davincidsp.com/index.php/OMAP-L1x/C674x/AM1x_SOC_Architecture_and_Throughput_Overview. This collection of Wiki articles provide i
  • Understanding TI's PCB Routing Rule-Based DDR Timing Specification (Rev. A)
    PDF, 93 Kb, Revision: A, File published: Jul 17, 2008
    This application report motivates the way the DDR high-speed timing requirements are now going to be communicated to system designers. The traditional method of using data sheet parameters and simulation models is tedious. The system designer uses this information to evaluate whether timing specifications are met and can be expected to operate reliably.Ultimately, the real question the hardwa
  • High-Speed Interface Layout Guidelines (Rev. G)
    PDF, 814 Kb, Revision: G, File published: Jul 27, 2017
    As modern bus interface frequencies scale higher, care must be taken in the printed circuit board (PCB) layout phase of a design to ensure a robust solution.

Model Line

Manufacturer's Classification

  • Semiconductors > Processors > Sitara Processors > ARM9 > AM1x