Datasheet Texas Instruments AM3715

ManufacturerTexas Instruments
SeriesAM3715
Datasheet Texas Instruments AM3715

Sitara Processor

Datasheets

AM3715, AM3703 Sitara ARM Microprocessors datasheet
PDF, 3.2 Mb, Revision: F, File published: Aug 29, 2011
Extract from the document

Prices

Status

AM3715CBCAM3715CBC100AM3715CBCD100AM3715CBPAM3715CBP100AM3715CBPAAM3715CBPD100AM3715CUSAM3715CUS100AM3715CUSAAM3715CUSD100
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoYesYesYesYesYesYesNoYesNoYes

Packaging

AM3715CBCAM3715CBC100AM3715CBCD100AM3715CBPAM3715CBP100AM3715CBPAAM3715CBPD100AM3715CUSAM3715CUS100AM3715CUSAAM3715CUSD100
N1234567891011
Pin515515515515515515515423423423423
Package TypeCBCCBCCBCCBPCBPCBPCBPCUSCUSCUSCUS
Industry STD TermPOP-FCBGAPOP-FCBGAPOP-FCBGAPOP-FCBGAPOP-FCBGAPOP-FCBGAPOP-FCBGAFC/CSPFC/CSPFC/CSPFC/CSP
JEDEC CodeS-PBGA-NS-PBGA-NS-PBGA-NS-PBGA-NS-PBGA-NS-PBGA-NS-PBGA-NS-PBGA-NS-PBGA-NS-PBGA-NS-PBGA-N
Package QTY11911911916816816816890909090
CarrierJEDEC TRAY (5+1)JEDEC TRAY (5+1)JEDEC TRAY (5+1)JEDEC TRAY (5+1)JEDEC TRAY (5+1)JEDEC TRAY (5+1)JEDEC TRAY (5+1)JEDEC TRAY (5+1)JEDEC TRAY (5+1)JEDEC TRAY (5+1)
Device MarkingAM3715CBCAM3715CBC100AM3715CBCD100AM3715CBP-AS3AM3715CBP100-AS3AM3715CBPAAM3715CBPD100-AS3AM3715CUSAM3715CUS100AM3715CUSAAM3715CUSD100
Width (mm)1414141212121216161616
Length (mm)1414141212121216161616
Thickness (mm).63.63.63.5.5.5.5.96.96.96.96
Pitch (mm).5.5.5.4.4.4.4.65.65.65.65
Max Height (mm).95.95.95.7.7.7.71.41.41.41.4
Mechanical DataDownloadDownloadDownloadDownloadDownloadDownloadDownloadDownloadDownloadDownloadDownload

Parametrics

Parameters / ModelsAM3715CBC
AM3715CBC
AM3715CBC100
AM3715CBC100
AM3715CBCD100
AM3715CBCD100
AM3715CBP
AM3715CBP
AM3715CBP100
AM3715CBP100
AM3715CBPA
AM3715CBPA
AM3715CBPD100
AM3715CBPD100
AM3715CUS
AM3715CUS
AM3715CUS100
AM3715CUS100
AM3715CUSA
AM3715CUSA
AM3715CUSD100
AM3715CUSD100
ARM CPU1 ARM Cortex-A81 ARM Cortex-A81 ARM Cortex-A81 ARM Cortex-A81 ARM Cortex-A81 ARM Cortex-A81 ARM Cortex-A81 ARM Cortex-A81 ARM Cortex-A81 ARM Cortex-A81 ARM Cortex-A8
ARM MHz, Max.10001000100010001000100010001000100010001000
ApplicationsIndustrial,Personal ElectronicsIndustrial,Personal ElectronicsIndustrial,Personal ElectronicsIndustrial,Personal ElectronicsIndustrial,Personal ElectronicsIndustrial,Personal ElectronicsIndustrial,Personal ElectronicsIndustrial,Personal ElectronicsIndustrial,Personal ElectronicsIndustrial,Personal ElectronicsIndustrial,Personal Electronics
DRAMLPDDRLPDDRLPDDRLPDDRLPDDRLPDDRLPDDRLPDDRLPDDRLPDDRLPDDR
Display OptionsDSSDSSDSSDSSDSSDSSDSSDSSDSSDSSDSS
Graphics Acceleration1 3D1 3D1 3D1 3D1 3D1 3D1 3D1 3D1 3D1 3D1 3D
I2C44444444444
On-Chip L2 Cache256 KB (ARM Cortex-A8)256 KB (ARM Cortex-A8)256 KB (ARM Cortex-A8)256 KB (ARM Cortex-A8)256 KB (ARM Cortex-A8)256 KB (ARM Cortex-A8)256 KB (ARM Cortex-A8)256 KB (ARM Cortex-A8)256 KB (ARM Cortex-A8)256 KB (ARM Cortex-A8)256 KB (ARM Cortex-A8)
Operating SystemsAndroid,Integrity,Linux,Neutrino,VxWorks,Windows Embedded CEAndroid,Integrity,Linux,Neutrino,VxWorks,Windows Embedded CEAndroid,Integrity,Linux,Neutrino,VxWorks,Windows Embedded CEAndroid,Integrity,Linux,Neutrino,VxWorks,Windows Embedded CEAndroid,Integrity,Linux,Neutrino,VxWorks,Windows Embedded CEAndroid,Integrity,Linux,Neutrino,VxWorks,Windows Embedded CEAndroid,Integrity,Linux,Neutrino,VxWorks,Windows Embedded CEAndroid,Integrity,Linux,Neutrino,VxWorks,Windows Embedded CEAndroid,Integrity,Linux,Neutrino,VxWorks,Windows Embedded CEAndroid,Integrity,Linux,Neutrino,VxWorks,Windows Embedded CEAndroid,Integrity,Linux,Neutrino,VxWorks,Windows Embedded CE
Operating Temperature Range, C-40 to 105,-40 to 90,0 to 90-40 to 105,-40 to 90,0 to 90-40 to 105,-40 to 90,0 to 90-40 to 105,-40 to 90,0 to 90-40 to 105,-40 to 90,0 to 90-40 to 105,-40 to 90,0 to 90-40 to 105,-40 to 90,0 to 90-40 to 105,-40 to 90,0 to 90-40 to 105,-40 to 90,0 to 90-40 to 105,-40 to 90,0 to 90-40 to 105,-40 to 90,0 to 90
Other On-Chip Memory64 KB64 KB64 KB64 KB64 KB64 KB64 KB64 KB64 KB64 KB64 KB
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
SPI44444444444
UART, SCI44444444444
USB44444444444
Video Port, Configurable1 Input,1 Output1 Input,1 Output1 Input,1 Output1 Input,1 Output1 Input,1 Output1 Input,1 Output1 Input,1 Output1 Input,1 Output1 Input,1 Output1 Input,1 Output1 Input,1 Output

Eco Plan

AM3715CBCAM3715CBC100AM3715CBCD100AM3715CBPAM3715CBP100AM3715CBPAAM3715CBPD100AM3715CUSAM3715CUS100AM3715CUSAAM3715CUSD100
RoHSCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliant

Application Notes

  • AM3715/03 SDRC Subsystem
    PDF, 19 Kb, File published: Jun 3, 2010
    This article has been contributed to the TI Developer Wiki. To see the most recently updated version or to contribute, visit this topic at:http://processors.wiki.ti.com/index.php/AM3715/03_SDRC_SubsystemThe SDRC subsystem module provides connectivity between the AM37x and SDRAM memory components. The module incl
  • AM3715 GPMC
    PDF, 19 Kb, File published: Jun 3, 2010
    This article has been contributed to the TI Developer Wiki. To see the most recently updated version or to contribute, visit this topic at:href=http://processors.wiki.ti.com/index.php/Am3715_gpmcThe GPMC is a 16-bit external memory controller. The GPMC data access engine provides a flexible programming model for communicatio
  • AM/DM37x Power Estimation Spreadsheet
    PDF, 20 Kb, File published: Jun 7, 2010
    This article has been contributed to the TI Developer Wiki. To see the most recently updated version or tocontribute, visit this topic at:http://processors.wiki.ti.com/index.php/AM/DM37x_Power_Estimation_SpreadsheetThis article discusses the power consumption of the Texas Instruments AM/DM37x high
  • AM/DM37x Overview
    PDF, 19 Kb, File published: Jun 3, 2010
    This article has been contributed to the TI Developer Wiki. To see the most recently updated version or to contribute, visit this topic at:http://processors.wiki.ti.com/index.php/AM/DM37x_Overview.This document provides an overview of the AM37x applications processor.All trademarks are property of their respective
  • AM3715/03 Memory Subsystem
    PDF, 19 Kb, File published: Jun 3, 2010
    This article has been contributed to the TI Developer Wiki. To see the most recently updated version or to contribute, visit this topic at:http://processors.wiki.ti.com/index.php/AM3715/03_Memory_SubsystemThe Memory Subsystem in the AM3715/03 devices consists of the internal SRAM and two dedicated memory contr
  • AM37x/DM37x Schematic Checklist
    PDF, 19 Kb, File published: Jun 3, 2010
    This article has been contributed to the TI Developer Wiki. To see the most recently updated version or to contribute, visit this topic at:http://processors.wiki.ti.com/index.php/AM37x/DM37x_Schematic_Checklist.This article provides many tips related to reset, JTAG, peripherals, etc. It should be used as
  • AM37x EVM Software Developer's Guide
    PDF, 19 Kb, File published: Jun 3, 2010
    This article has been contributed to the TI Developer Wiki. To see the most recently updated version or to contribute, visit this topic at:http://processors.wiki.ti.com/index.php/AM37x_EVM_Software_Developer%27s_Guide.This wiki article illustrates the various software components provided with the A
  • PCB Design Req for Dist. Network for TI OMAP3630, AM37xx, and DM37xx MCUs
    PDF, 739 Kb, File published: Jun 15, 2011
    The purpose of a power distribution network (PDN) is to provide clean and reliable power to active devices in the system. The printed circuit board (PCB) is a critical component of the system-level PDN. Therefore, the PCB design is of utmost importance for high-performance low-power microprocessors. This application report provides design requirements and details a step-by-step methodology on how
  • Ethernet Connectivity via GPMC
    PDF, 19 Kb, File published: Jun 3, 2010
    This article has been contributed to the TI Developer Wiki. To see the most recently updated version or to contribute, visit this topic at:http://processors.wiki.ti.com/index.php/Ethernet_Connectivity_via_GPMCThe purpose of this article is to describe a solution for connecting Ethernet to various devices,
  • Setting up AM37x SDRC Registers
    PDF, 19 Kb, File published: Jun 3, 2010
    This article has been contributed to the TI Developer Wiki. To see the most recently updated version or to contribute, visit this topic at:http://processors.wiki.ti.com/index.php/Setting_up_AM37x_SDRC_registersThis wiki article describes how to set the SDRC registers in the OMAP35x SDRC module depending o
  • AM37x CUS Routing Guidelines
    PDF, 19 Kb, File published: Jun 3, 2010
    This article has been contributed to the TI Developer Wiki. To see the most recently updated version or to contribute, visit this topic at:http://processors.wiki.ti.com/index.php/AM37x_CUS_Routing_Guidelines.CUS package is designed with a new technology called Via Channelв„ў array. This technology allows for e
  • OMAP35x to AM37x Hardware Migration Guide
    PDF, 37 Kb, File published: Jun 3, 2010
    This article has been contributed to the TI Developer Wiki. To see the most recently updated version or to contribute visit this topic at:

    http://processors.wiki.ti.com/index.php/OMAP35x_To_AM37x_Hardware_Migration_Guide.

    The OMAP35x to AM37x Hardware Migration Guide describes device consideratio

  • PCB Assembly Guidelines for 0.4mm Package-On-Package (PoP) Packages Part II (Rev. A)
    PDF, 2.4 Mb, Revision: A, File published: Nov 1, 2013
    Once the bottom circuit board has been designed the assembly guidelines for package-on-package (PoP) versions of the OMAP35xx processor and the memory device must be considered.

    PoP packages have an enormous number of variables associated with assembly. The following factors have a major effect on the quality and reliability of final assembly: the circuit board design the solder paste char

  • PCB Design Guidelines for 0.4mm Package-On-Package (PoP) Packages Part I (Rev. B)
    PDF, 6.7 Mb, Revision: B, File published: Jun 13, 2009
    Ball grid array (BGA) packages having 0.4mm ball pitch require careful attention to printed circuit board (PCB) design parameters to successfully yield reliable and robust assemblies; the standard rules of thumb don't apply anymore. In fact the design guidelines for 0.4mm and 0.5mm differ primarily due to issues surrounding shorts or opens between balls under the processor.In addition to the de
  • PCB Design Guidelines for 0.5mm Package-On-Package Apps Processors Part I
    PDF, 2.0 Mb, File published: Jun 23, 2010
    Ball grid array (BGA) packages having 0.5mm ball pitch require careful attention to printed circuit board (PCB) design parameters to successfully yield reliable and robust assemblies. PCBs with package-on-package (PoP) technology have additional assembly requirements and options that need to be considered when designing the PCB.

    Fine-pitch PCB design is a team effort and may require more than

  • PCB Assembly Guidelines for 0.5mm Package-on-Package Apps Processors Part II
    PDF, 1.2 Mb, File published: Jun 23, 2010
    Once the main printed circuit board (PCB) has been designed the assembly guidelines for the 0.5mm package-on-package (PoP) applications processor and companion memory device must be considered. PoP applications processors have an enormous number of variables associated with assembly. The following factors have a major effect on the quality and reliability of PCB assembly: PoP applications process

Model Line

Manufacturer's Classification

  • Semiconductors> Processors> Sitara Processors> ARM Cortex-A8> AM3x