Datasheet Texas Instruments CD54AC74

ManufacturerTexas Instruments
SeriesCD54AC74
Datasheet Texas Instruments CD54AC74

Dual Positive-Edge-Triggered D-Type Flip-Flops with Set and Reset

Datasheets

CD54AC74, CD74AC74 datasheet
PDF, 786 Kb, Revision: D, File published: Dec 5, 2002
Extract from the document

Prices

Status

CD54AC74F3A
Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

Packaging

CD54AC74F3A
N1
Pin14
Package TypeJ
Industry STD TermCDIP
JEDEC CodeR-GDIP-T
Package QTY1
CarrierTUBE
Device MarkingCD54AC74F3A
Width (mm)6.67
Length (mm)19.56
Thickness (mm)4.57
Pitch (mm)2.54
Max Height (mm)5.08
Mechanical DataDownload

Parametrics

Parameters / ModelsCD54AC74F3A
CD54AC74F3A
3-State OutputNo
Bits2
F @ Nom Voltage(Max), Mhz100
ICC @ Nom Voltage(Max), mA0.04
Input TypeCMOS
Operating Temperature Range, C-55 to 125
Output Drive (IOL/IOH)(Max), mA24/-24
Output TypeCMOS
Package GroupCDIP
Package Size: mm2:W x L, PKGSee datasheet (CDIP)
RatingMilitary
Technology FamilyAC
VCC(Max), V5.5
VCC(Min), V1.5
tpd @ Nom Voltage(Max), ns114,12.7,9.1

Eco Plan

CD54AC74F3A
RoHSSee ti.com

Application Notes

  • Power-Up Behavior of Clocked Devices (Rev. A)
    PDF, 34 Kb, Revision: A, File published: Feb 6, 2015
  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Kb, File published: Apr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

Model Line

Series: CD54AC74 (1)

Manufacturer's Classification

  • Semiconductors> Space & High Reliability> Logic Products> Flip-Flop/Latch/Registers