Datasheet Texas Instruments CD74AC374

ManufacturerTexas Instruments
SeriesCD74AC374
Datasheet Texas Instruments CD74AC374

Octal D-Type Flip-Flops with 3-State Outputs

Datasheets

Octal D-Type Flip-Flops, 3-State datasheet
PDF, 1.3 Mb, File published: Dec 3, 1998
Extract from the document

Prices

Status

CD74AC374ECD74AC374EE4CD74AC374MCD74AC374M96CD74AC374M96E4CD74AC374ME4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoNoNoNo

Packaging

CD74AC374ECD74AC374EE4CD74AC374MCD74AC374M96CD74AC374M96E4CD74AC374ME4
N123456
Pin202020202020
Package TypeNNDWDWDWDW
Industry STD TermPDIPPDIPSOICSOICSOICSOIC
JEDEC CodeR-PDIP-TR-PDIP-TR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY2020252000200025
CarrierTUBETUBETUBELARGE T&RLARGE T&RTUBE
Device MarkingCD74AC374ECD74AC374EAC374MAC374MAC374MAC374M
Width (mm)6.356.357.57.57.57.5
Length (mm)24.3324.3312.812.812.812.8
Thickness (mm)4.574.572.352.352.352.35
Pitch (mm)2.542.541.271.271.271.27
Max Height (mm)5.085.082.652.652.652.65
Mechanical DataDownloadDownloadDownloadDownloadDownloadDownload

Parametrics

Parameters / ModelsCD74AC374E
CD74AC374E
CD74AC374EE4
CD74AC374EE4
CD74AC374M
CD74AC374M
CD74AC374M96
CD74AC374M96
CD74AC374M96E4
CD74AC374M96E4
CD74AC374ME4
CD74AC374ME4
3-State OutputYesYesYesYesYesYes
Bits888888
F @ Nom Voltage(Max), Mhz100100100100100100
ICC @ Nom Voltage(Max), mA0.080.080.080.080.080.08
Operating Temperature Range, C-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125-55 to 125
Output Drive (IOL/IOH)(Max), mA24/-2424/-2424/-2424/-2424/-2424/-24
Package GroupPDIPPDIPSOICSOICSOICSOIC
Package Size: mm2:W x L, PKGSee datasheet (PDIP)See datasheet (PDIP)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)20SOIC: 132 mm2: 10.3 x 12.8(SOIC)
RatingCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNo
Technology FamilyACACACACACAC
VCC(Max), V5.55.55.55.55.55.5
VCC(Min), V1.51.51.51.51.51.5
Voltage(Nom), V1.5,3.3,51.5,3.3,51.5,3.3,51.5,3.3,51.5,3.3,51.5,3.3,5
tpd @ Nom Voltage(Max), ns123,13.7,9.8123,13.7,9.8123,13.7,9.8123,13.7,9.8123,13.7,9.8123,13.7,9.8

Eco Plan

CD74AC374ECD74AC374EE4CD74AC374MCD74AC374M96CD74AC374M96E4CD74AC374ME4
RoHSCompliantCompliantCompliantCompliantCompliantCompliant
Pb FreeYesYes

Application Notes

  • Power-Up Behavior of Clocked Devices (Rev. A)
    PDF, 34 Kb, Revision: A, File published: Feb 6, 2015
  • Using High Speed CMOS and Advanced CMOS in Systems With Multiple Vcc
    PDF, 43 Kb, File published: Apr 1, 1996
    Though low power consumption is a feature of CMOS devices sometimes this feature does not meet a designer?s system power supply constraints. Therefore a partial system power down or multiple Vcc supplies are used to meet the needs of the system. This document shows electrostatic discharge protection circuits. It also provides circuit and bus driver examples of partial system power down and curren

Model Line

Manufacturer's Classification

  • Semiconductors> Logic> Flip-Flop/Latch/Register> D-Type Flip-Flop