Datasheet Texas Instruments CD74HC573
| Manufacturer | Texas Instruments |
| Series | CD74HC573 |
High Speed CMOS Logic Octal Transparent Latches with 3-State Outputs
Datasheets
CD54HC573, CD74HC573 datasheet
PDF, 893 Kb, Revision: A, File published: Apr 24, 2003
Extract from the document
Prices
Status
| CD74HC573E | CD74HC573EE4 | CD74HC573M | CD74HC573M96 | CD74HC573M96G4 | CD74HC573MG4 | |
|---|---|---|---|---|---|---|
| Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No | No | No | No | No | No |
Packaging
| CD74HC573E | CD74HC573EE4 | CD74HC573M | CD74HC573M96 | CD74HC573M96G4 | CD74HC573MG4 | |
|---|---|---|---|---|---|---|
| N | 1 | 2 | 3 | 4 | 5 | 6 |
| Pin | 20 | 20 | 20 | 20 | 20 | 20 |
| Package Type | N | N | DW | DW | DW | DW |
| Industry STD Term | PDIP | PDIP | SOIC | SOIC | SOIC | SOIC |
| JEDEC Code | R-PDIP-T | R-PDIP-T | R-PDSO-G | R-PDSO-G | R-PDSO-G | R-PDSO-G |
| Package QTY | 20 | 20 | 25 | 2000 | 2000 | 25 |
| Carrier | TUBE | TUBE | TUBE | LARGE T&R | LARGE T&R | TUBE |
| Device Marking | CD74HC573E | CD74HC573E | HC573M | HC573M | HC573M | HC573M |
| Width (mm) | 6.35 | 6.35 | 7.5 | 7.5 | 7.5 | 7.5 |
| Length (mm) | 24.33 | 24.33 | 12.8 | 12.8 | 12.8 | 12.8 |
| Thickness (mm) | 4.57 | 4.57 | 2.35 | 2.35 | 2.35 | 2.35 |
| Pitch (mm) | 2.54 | 2.54 | 1.27 | 1.27 | 1.27 | 1.27 |
| Max Height (mm) | 5.08 | 5.08 | 2.65 | 2.65 | 2.65 | 2.65 |
| Mechanical Data | Download | Download | Download | Download | Download | Download |
Parametrics
| Parameters / Models | CD74HC573E | CD74HC573EE4 | CD74HC573M | CD74HC573M96 | CD74HC573M96G4 | CD74HC573MG4 |
|---|---|---|---|---|---|---|
| 3-State Output | Yes | Yes | Yes | Yes | Yes | Yes |
| Bits | 8 | 8 | 8 | 8 | 8 | 8 |
| F @ Nom Voltage(Max), Mhz | 28 | 28 | 28 | 28 | 28 | 28 |
| ICC @ Nom Voltage(Max), mA | 0.08 | 0.08 | 0.08 | 0.08 | 0.08 | 0.08 |
| Operating Temperature Range, C | -55 to 125 | -55 to 125 | -55 to 125 | -55 to 125 | -55 to 125 | -55 to 125 |
| Output Drive (IOL/IOH)(Max), mA | 7.8/-7.8 | 7.8/-7.8 | 7.8/-7.8 | 7.8/-7.8 | 7.8/-7.8 | 7.8/-7.8 |
| Package Group | PDIP | PDIP | SOIC | SOIC | SOIC | SOIC |
| Package Size: mm2:W x L, PKG | See datasheet (PDIP) | See datasheet (PDIP) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) |
| Rating | Catalog | Catalog | Catalog | Catalog | Catalog | Catalog |
| Schmitt Trigger | No | No | No | No | No | No |
| Technology Family | HC | HC | HC | HC | HC | HC |
| VCC(Max), V | 6 | 6 | 6 | 6 | 6 | 6 |
| VCC(Min), V | 2 | 2 | 2 | 2 | 2 | 2 |
| Voltage(Nom), V | 6 | 6 | 6 | 6 | 6 | 6 |
| tpd @ Nom Voltage(Max), ns | 37 | 37 | 37 | 37 | 37 | 37 |
Eco Plan
| CD74HC573E | CD74HC573EE4 | CD74HC573M | CD74HC573M96 | CD74HC573M96G4 | CD74HC573MG4 | |
|---|---|---|---|---|---|---|
| RoHS | Compliant | Compliant | Compliant | Compliant | Compliant | Compliant |
| Pb Free | Yes | Yes |
Application Notes
- Power-Up Behavior of Clocked Devices (Rev. A)PDF, 34 Kb, Revision: A, File published: Feb 6, 2015
- SN54/74HCT CMOS Logic Family Applications and RestrictionsPDF, 102 Kb, File published: May 1, 1996
The TI SN54/74HCT family of CMOS devices is a subgroup of the SN74HC series with the HCT circuitry modified to meet the interfacing requirements of TTL outputs to high-speed CMOS inputs. The HCT devices can be driven by the TTL circuits directly without additional components. This document describes the TTL/HC interface the operating voltages circuit noise and power consumption. A Bergeron anal
Model Line
Series: CD74HC573 (6)
Manufacturer's Classification
- Semiconductors> Logic> Flip-Flop/Latch/Register> D-Type Latch
