Datasheet Texas Instruments CD74HCT563M
| Manufacturer | Texas Instruments |
| Series | CD74HCT563 |
| Part Number | CD74HCT563M |
High Speed CMOS Logic Octal Transparent Inverting Latches with 3-State Outputs 20-SOIC -55 to 125
Datasheets
CD54/74HC533, CD54/74HCT533, CD54/74HC563, CD74HCT563 datasheet
PDF, 533 Kb, Revision: C, File published: Jun 20, 2003
Extract from the document
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Status
| Lifecycle Status | Active (Recommended for new designs) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 20 |
| Package Type | DW |
| Industry STD Term | SOIC |
| JEDEC Code | R-PDSO-G |
| Package QTY | 25 |
| Carrier | TUBE |
| Device Marking | HCT563M |
| Width (mm) | 7.5 |
| Length (mm) | 12.8 |
| Thickness (mm) | 2.35 |
| Pitch (mm) | 1.27 |
| Max Height (mm) | 2.65 |
| Mechanical Data | Download |
Parametrics
| 3-State Output | Yes |
| Bits | 8 |
| F @ Nom Voltage(Max) | 25 Mhz |
| ICC @ Nom Voltage(Max) | 0.08 mA |
| Operating Temperature Range | -55 to 125 C |
| Output Drive (IOL/IOH)(Max) | 6/-6 mA |
| Package Group | SOIC |
| Package Size: mm2:W x L | 20SOIC: 132 mm2: 10.3 x 12.8(SOIC) PKG |
| Rating | Catalog |
| Schmitt Trigger | No |
| Technology Family | HCT |
| VCC(Max) | 5.5 V |
| VCC(Min) | 4.5 V |
| Voltage(Nom) | 5 V |
| tpd @ Nom Voltage(Max) | 40 ns |
Eco Plan
| RoHS | Compliant |
Application Notes
- Power-Up Behavior of Clocked Devices (Rev. A)PDF, 34 Kb, Revision: A, File published: Feb 6, 2015
Model Line
Series: CD74HCT563 (4)
- CD74HCT563E CD74HCT563M CD74HCT563ME4 CD74HCT563MG4
Manufacturer's Classification
- Semiconductors > Logic > Flip-Flop/Latch/Register > D-Type Latch
