Datasheet Texas Instruments DS15EA101

ManufacturerTexas Instruments
SeriesDS15EA101
Datasheet Texas Instruments DS15EA101

DS15EA101 0.15 to 1.5 Gbps Adaptive Cable Equalizer with LOS Detection

Datasheets

DS15EA101 0.15 to 1.5 Gbps Adaptive Cable Equalizer with LOS Detection datasheet
PDF, 1.1 Mb, Revision: H, File published: Apr 12, 2013
Extract from the document

Prices

Status

DS15EA101SQ/NOPBDS15EA101SQE/NOPBDS15EA101SQX/NOPB
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoYesYes

Packaging

DS15EA101SQ/NOPBDS15EA101SQE/NOPBDS15EA101SQX/NOPB
N123
Pin161616
Package TypeRGHRGHRGH
Industry STD TermWQFNWQFNWQFN
JEDEC CodeS-PQFP-NS-PQFP-NS-PQFP-N
Package QTY10002504500
CarrierSMALL T&RSMALL T&RLARGE T&R
Device Marking15EA10115EA10115EA101
Width (mm)444
Length (mm)444
Thickness (mm).75.75.75
Pitch (mm).5.5.5
Max Height (mm).8.8.8
Mechanical DataDownloadDownloadDownload

Parametrics

Parameters / ModelsDS15EA101SQ/NOPB
DS15EA101SQ/NOPB
DS15EA101SQE/NOPB
DS15EA101SQE/NOPB
DS15EA101SQX/NOPB
DS15EA101SQX/NOPB
Approx. Price (US$)4.85 | 1ku
ESD HBM, kV88
FunctionEqualizerEqualizer
ICC(Max)(mA)77
Input Compatibility800 mVp-p Swing
Must be AC-Coupled
Number of Channels(#)1
Operating Temperature Range, C-40 to 85-40 to 85
Operating Temperature Range(C)-40 to 85
Output CompatibilityCML
LVDS
Package GroupWQFNWQFNWQFN
Package Size: mm2:W x L, PKG16WQFN: 16 mm2: 4 x 4(WQFN)16WQFN: 16 mm2: 4 x 4(WQFN)
Package Size: mm2:W x L (PKG)16WQFN: 16 mm2: 4 x 4(WQFN)
ProtocolsGeneral Purpose
Speed(Max)(Gbps)1.5
SupplyVoltage(Volt)3.3

Eco Plan

DS15EA101SQ/NOPBDS15EA101SQE/NOPBDS15EA101SQX/NOPB
RoHSCompliantCompliantCompliant
Pb FreeYes

Application Notes

  • Extending the Signal Path Over Data Trans Lines Using LVDS Signal Conditioning
    PDF, 575 Kb, File published: Aug 2, 2007
  • Extending the Reach of a FPD-Link II Interface with Cable Drivers and Equalizers (Rev. A)
    PDF, 118 Kb, Revision: A, File published: Apr 26, 2013
    TI's family of embedded clock LVDS SER/DES (FPD-link II) provides a 2-wire serial interface for displayapplications up to distances of 10 meters.
  • Signal Integrity Eval of Bourns Lightning Protection Solutions w/HS Interfaces
    PDF, 975 Kb, File published: Jan 8, 2010
  • DS15BA101 & DS15EA101 Enable Long Reach Applications for Embedded Clock SER/DES (Rev. E)
    PDF, 170 Kb, Revision: E, File published: Apr 29, 2013
    Reduction in system size, increase in system performance and savings in system cost are valuablebenefits that SER/DES devices (Serializers and Deserializers) bring to many system designers. Thesebenefits are the reason why SER/DES are integral pieces of many of today’s high-speed systems.One of the design constraints for these systems is the maximum transmission distance between a serializer

Model Line

Manufacturer's Classification

  • Semiconductors> Interface> Signal Conditioners> Equalizer