Datasheet Texas Instruments DS25BR110TSD/NOPB

3.125 Gbps LVDS Buffer with Receive Equalization 8-WSON -40 to 85

Datasheets

PDF, 879 Kb, Revision: E, File published: Apr 14, 2013

Extract from the document

Lifecycle Status	Active (Recommended for new designs)
Manufacture's Sample Availability	Yes

Device Type	Buffer
ESD HBM	7 kV
Function	Equalizer
ICC(Max)	43 mA
Operating Temperature Range	-40 to 85 C
Package Group	WSON
Package Size: mm2:W x L	See datasheet (WSON) PKG
Protocols	LVDS

RoHS

Compliant

Evaluation Modules & Boards: DS25BR100EVK
3.125 Gbps LVDS Single Channel Buffers with Transmit Pre-emphasis and Receive Equalization family
Lifecycle Status: Active (Recommended for new designs)
- Download

Download
Extending the Signal Path Over Data Trans Lines Using LVDS Signal Conditioning
PDF, 575 Kb, File published: Aug 2, 2007
Download
LVDS Repeaters and Crosspoints Extend the Reach of FPD-Link II Interfaces (Rev. A)
PDF, 101 Kb, Revision: A, File published: Apr 29, 2013
This application note introduces Texas InstrumentвЂ™s LVDS devices with built-in pre-emphasis andequalization circuits, recommends when it makes sense to employ them with the FPD-Link II SER/DES,shows how to optimally interface them to the SER/DES, and discusses distance gains that may berealized with their signal enhancing functions.
Download
AN-1957 LVDS Signal Conditioners Reduce Data-Dependent Jitter (Rev. A)
PDF, 275 Kb, Revision: A, File published: Apr 26, 2013
Jitter is a phenomenon troubling many designers of high-speed interfaces. It reduces available timingmargin, limits transmission distance between a transmitter and a receiver, and increases system cost bydemanding better performing and more expensive interconnects. LVDS interfaces are not spared fromthese ill effects as they now operate at bit rates exceeding the 3 Gbps mark. Texas Instrumen

Series: DS25BR110 (2)

Semiconductors > Interface > LVDS/M-LVDS/PECL > Buffers, Drivers/Receivers and Cross-Points