Datasheet Texas Instruments DS92LV3222
Manufacturer | Texas Instruments |
Series | DS92LV3222 |
20-50 MHz 32-Bit Channel Link II Deserializer
Datasheets
DS92LV3221/3222 20-50 MHz 32-Bit Channel Link II Serializer / Deserializer datasheet
PDF, 1.4 Mb, Revision: C, File published: Apr 16, 2013
Extract from the document
Prices
Status
DS92LV3222TVS/NOPB | DS92LV3222TVSX/NOPB | |
---|---|---|
Lifecycle Status | Active (Recommended for new designs) | Active (Recommended for new designs) |
Manufacture's Sample Availability | No | Yes |
Packaging
DS92LV3222TVS/NOPB | DS92LV3222TVSX/NOPB | |
---|---|---|
N | 1 | 2 |
Pin | 64 | 64 |
Package Type | PAG | PAG |
Industry STD Term | TQFP | TQFP |
JEDEC Code | S-PQFP-G | S-PQFP-G |
Package QTY | 160 | 1000 |
Carrier | JEDEC TRAY (10+1) | LARGE T&R |
Device Marking | TVS | TVS |
Width (mm) | 10 | 10 |
Length (mm) | 10 | 10 |
Thickness (mm) | 1 | 1 |
Pitch (mm) | .5 | .5 |
Max Height (mm) | 1.2 | 1.2 |
Mechanical Data | Download | Download |
Parametrics
Parameters / Models | DS92LV3222TVS/NOPB | DS92LV3222TVSX/NOPB |
---|---|---|
Clock Max, MHz | 50 | 50 |
Clock Min, MHz | 20 | 20 |
Compression Ratio | 32 to 2 | 32 to 2 |
ESD, kV | 4 | 4 |
Function | Deserializer | Deserializer |
Input Compatibility | LVDS | LVDS |
Operating Temperature Range, C | -40 to 85 | -40 to 85 |
Output Compatibility | LVCMOS | LVCMOS |
Package Group | TQFP | TQFP |
Package Size: mm2:W x L, PKG | 64TQFP: 144 mm2: 12 x 12(TQFP) | 64TQFP: 144 mm2: 12 x 12(TQFP) |
Parallel Bus Width, bits | 32 | 32 |
Protocols | Channel-Link II | Channel-Link II |
Rating | Catalog | Catalog |
Eco Plan
DS92LV3222TVS/NOPB | DS92LV3222TVSX/NOPB | |
---|---|---|
RoHS | Compliant | Compliant |
Application Notes
- Improving the Robustness of Channel Link Designs with Channel Link II Ser/Des (Rev. A)PDF, 62 Kb, Revision: A, File published: Apr 26, 2013
This application note discusses how system designers are able to use Channel Link II ser/Des to improve old and new channel link designs. - DS15BA101 & DS15EA101 Enable Long Reach Applications for Embedded Clock SER/DES (Rev. E)PDF, 170 Kb, Revision: E, File published: Apr 29, 2013
Reduction in system size, increase in system performance and savings in system cost are valuablebenefits that SER/DES devices (Serializers and Deserializers) bring to many system designers. Thesebenefits are the reason why SER/DES are integral pieces of many of today’s high-speed systems.One of the design constraints for these systems is the maximum transmission distance between a serializer
Model Line
Series: DS92LV3222 (2)
Manufacturer's Classification
- Semiconductors> Interface> Serializer, Deserializer> Channel Link II