Datasheet Texas Instruments OPA691

ManufacturerTexas Instruments
SeriesOPA691
Datasheet Texas Instruments OPA691

Wideband Current Feedback Operational Amplifier with Disable

Datasheets

Wideband, Current Feedback Operational Amplifier With Disable datasheet
PDF, 1.1 Mb, Revision: D, File published: Jul 2, 2008
Extract from the document

Prices

Status

OPA691IDOPA691IDBVROPA691IDBVRG4OPA691IDBVTOPA691IDBVTG4OPA691IDG4OPA691IDROPA691IDRG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesYesYesYesNoNoNoNo

Packaging

OPA691IDOPA691IDBVROPA691IDBVRG4OPA691IDBVTOPA691IDBVTG4OPA691IDG4OPA691IDROPA691IDRG4
N12345678
Pin86666888
Package TypeDDBVDBVDBVDBVDDD
Industry STD TermSOICSOT-23SOT-23SOT-23SOT-23SOICSOICSOIC
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY75300030002502507525002500
CarrierTUBELARGE T&RLARGE T&RSMALL T&RSMALL T&RTUBELARGE T&RLARGE T&R
Device Marking691OAFIOAFIOAFIOAFIOPAOPAOPA
Width (mm)3.911.61.61.61.63.913.913.91
Length (mm)4.92.92.92.92.94.94.94.9
Thickness (mm)1.581.21.21.21.21.581.581.58
Pitch (mm)1.27.95.95.95.951.271.271.27
Max Height (mm)1.751.451.451.451.451.751.751.75
Mechanical DataDownloadDownloadDownloadDownloadDownloadDownloadDownloadDownload

Parametrics

Parameters / ModelsOPA691ID
OPA691ID
OPA691IDBVR
OPA691IDBVR
OPA691IDBVRG4
OPA691IDBVRG4
OPA691IDBVT
OPA691IDBVT
OPA691IDBVTG4
OPA691IDBVTG4
OPA691IDG4
OPA691IDG4
OPA691IDR
OPA691IDR
OPA691IDRG4
OPA691IDRG4
2nd Harmonic, dBc7070707070707070
3rd Harmonic, dBc7474747474747474
@ MHz55555555
Acl, min spec gain, V/V11111111
Additional FeaturesShutdownShutdownShutdownShutdownShutdownShutdownShutdownShutdown
ArchitectureBipolar,Current FBBipolar,Current FBBipolar,Current FBBipolar,Current FBBipolar,Current FBBipolar,Current FBBipolar,Current FBBipolar,Current FB
BW @ Acl, MHz280280280280280280280280
CMRR(Min), dB5252525252525252
CMRR(Typ), dB5656565656565656
GBW(Typ), MHz280280280280280280280280
Input Bias Current(Max), pA3500000035000000350000003500000035000000350000003500000035000000
Iq per channel(Max), mA5.35.35.35.35.35.35.35.3
Iq per channel(Typ), mA5.15.15.15.15.15.15.15.1
Number of Channels11111111
Offset Drift(Typ), uV/C2020202020202020
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Output Current(Typ), mA190190190190190190190190
Package GroupSOICSOT-23SOT-23SOT-23SOT-23SOICSOICSOIC
Package Size: mm2:W x L, PKG8SOIC: 29 mm2: 6 x 4.9(SOIC)6SOT-23: 8 mm2: 2.8 x 2.9(SOT-23)6SOT-23: 8 mm2: 2.8 x 2.9(SOT-23)6SOT-23: 8 mm2: 2.8 x 2.9(SOT-23)6SOT-23: 8 mm2: 2.8 x 2.9(SOT-23)8SOIC: 29 mm2: 6 x 4.9(SOIC)8SOIC: 29 mm2: 6 x 4.9(SOIC)8SOIC: 29 mm2: 6 x 4.9(SOIC)
Rail-to-RailNoNoNoNoNoNoNoNo
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Slew Rate(Typ), V/us21002100210021002100210021002100
Total Supply Voltage(Max), +5V=5, +/-5V=101212121212121212
Total Supply Voltage(Min), +5V=5, +/-5V=1044444444
Vn at 1kHz(Typ), nV/rtHz1.71.71.71.71.71.71.71.7
Vn at Flatband(Typ), nV/rtHz1.71.71.71.71.71.71.71.7
Vos (Offset Voltage @ 25C)(Max), mV2.52.52.52.52.52.52.52.5

Eco Plan

OPA691IDOPA691IDBVROPA691IDBVRG4OPA691IDBVTOPA691IDBVTG4OPA691IDG4OPA691IDROPA691IDRG4
RoHSCompliantCompliantCompliantCompliantCompliantCompliantCompliantCompliant

Application Notes

  • A Numerical Solution to an Analog Problem
    PDF, 210 Kb, File published: Apr 25, 2010
    In order to derive a solution for an analog circuit problem, it is often useful to develop a model. This approach is generally accepted as developing an analytical model. However, finding the analytical solution is not always practical or possible as a result of higher-degree polynomials that require further resolution, or because of the time needed to develop the solution completely. In these sit
  • Current Feedback Amplifiers: Review, Stability Analysis, and Applications
    PDF, 53 Kb, File published: Nov 20, 2000
    The majority of op amp circuits are closed-loop feedback systems that implement classical control theory analysis. Analog designers are comfortable with Voltage FeedBack (VFB) op amps in a closed-loop system and are familiar with the ideal op amp approximations feedback permit. This application bulletin will demonstrate how CFB op amps can be analyzed in a similar fashion. Once the closed-loop sim
  • Stabilizing Current-Feedback Op Amps While Optimizing Circuit Performance
    PDF, 280 Kb, File published: Apr 28, 2004
    Optimizing a circuit design with a current-feedback (CFB) op amp is a relatively straightforward task, once one understands how CFB op amps achieve stability. This application note explains a 2nd-order CFB model so that any designer can better understand the flexibility of the CFB op amp. This report also discusses stability analysis, the effects of parasitic components due to PCBs, optimization
  • Expanding the usability of current-feedback amplifiers
    PDF, 215 Kb, File published: Feb 28, 2005
  • Active filters using current-feedback amplifiers
    PDF, 227 Kb, File published: Feb 25, 2005
  • Wireline Data Transmission and Reception
    PDF, 191 Kb, File published: Jan 27, 2010
    Many types of wires are widely used to transmit data. Specifically, Category 3 and Category 5 (Cat3 and Cat5e, respectively)—also known as unshielded twisted pair or UTP lines—are now recommended for new telephone installations. Coaxial (coax) cables are used to distribute cable television (CATV) signals throughout a home. #12 and #14 American wire gauge (AWG) electric power distribution wire is a
  • RLC Filter Design for ADC Interface Applications (Rev. A)
    PDF, 299 Kb, Revision: A, File published: May 13, 2015
    As high performance Analog-to-Digital Converters (ADCs) continue to improve in their performance, the last stage interface from the final amplifier into the converter inputs becomes a critical element in the system design if the full converter dynamic range is desired. This application note describes the performance and design equations for a simple passive 2nd-order filter used successfully in AD
  • ADS5500, OPA695: PC Board Layout for Low Distortion High-Speed ADC Drivers
    PDF, 273 Kb, File published: Apr 22, 2004
    Once an analog-to-digital converter (ADC) and a driver/interface have been selected for a given application, the next step to achieving excellent performance is laying out the printed circuit board (PCB) that will support the application. This application report describes several techniques for optimizing a high-speed, 14-bit performance, differential driver PCB layout using a wideband operation
  • Measuring Board Parasitics in High-Speed Analog Design
    PDF, 134 Kb, File published: Jul 7, 2003
    Successful circuit designs using high-speed amplifiers can depend upon understanding and identifying parasitic PCB components. Simulating a design while including PCB parasitics can protect against unpleasant production surprises. This application report discusses an easy method for measuring parasitic components in a prototype or final PC board design by using a standard oscilloscope and low freq
  • Noise Analysis for High Speed Op Amps (Rev. A)
    PDF, 256 Kb, Revision: A, File published: Jan 17, 2005
    As system bandwidths have increased an accurate estimate of the noise contribution for each element in the signal channel has become increasingly important. Many designers are not however particularly comfortable with the calculations required to predict the total noise for an op amp or in the conversions between the different descriptions of noise. Considerable inconsistency between manufactu

Model Line

Manufacturer's Classification

  • Semiconductors> Amplifiers> Operational Amplifiers (Op Amps)> High-Speed Op Amps (>=50MHz)