Datasheet Texas Instruments OPA699

Manufacturer	Texas Instruments
Series	OPA699

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Packaging

Parametrics

Parameters / Models	OPA699ID	OPA699IDG4	OPA699IDR
2nd Harmonic, dBc	67	67	67
3rd Harmonic, dBc	87	87	87
@ MHz	5	5	5
Acl, min spec gain, V/V	4	4	4
Additional Features	N/A	N/A	N/A
Architecture	Voltage FB	Voltage FB	Voltage FB
BW @ Acl, MHz	260	260	260
CMRR(Min), dB	55	55	55
CMRR(Typ), dB	61	61	61
GBW(Typ), MHz	1000	1000	1000
Input Bias Current(Max), pA	10000000	10000000	10000000
Iq per channel(Max), mA	15.9	15.9	15.9
Iq per channel(Typ), mA	15.5	15.5	15.5
Number of Channels	1	1	1
Offset Drift(Typ), uV/C	15	15	15
Operating Temperature Range, C	-40 to 85	-40 to 85	-40 to 85
Output Current(Typ), mA	120	120	120
Package Group	SOIC	SOIC	SOIC
Package Size: mm2:W x L, PKG	8SOIC: 29 mm2: 6 x 4.9(SOIC)	8SOIC: 29 mm2: 6 x 4.9(SOIC)	8SOIC: 29 mm2: 6 x 4.9(SOIC)
Rail-to-Rail	No	No	No
Rating	Catalog	Catalog	Catalog
Slew Rate(Typ), V/us	1400	1400	1400
Total Supply Voltage(Max), +5V=5, +/-5V=10	12	12	12
Total Supply Voltage(Min), +5V=5, +/-5V=10	5	5	5
Vn at 1kHz(Typ), nV/rtHz	13	13	13
Vn at Flatband(Typ), nV/rtHz	4.1	4.1	4.1
Vos (Offset Voltage @ 25C)(Max), mV	5	5	5

Eco Plan

Application Notes

• Download
  RLC Filter Design for ADC Interface Applications (Rev. A)
  PDF, 299 Kb, Revision: A, File published: May 13, 2015
  As high performance Analog-to-Digital Converters (ADCs) continue to improve in their performance, the last stage interface from the final amplifier into the converter inputs becomes a critical element in the system design if the full converter dynamic range is desired. This application note describes the performance and design equations for a simple passive 2nd-order filter used successfully in AD
• Download
  ADS5500, OPA695: PC Board Layout for Low Distortion High-Speed ADC Drivers
  PDF, 273 Kb, File published: Apr 22, 2004
  Once an analog-to-digital converter (ADC) and a driver/interface have been selected for a given application, the next step to achieving excellent performance is laying out the printed circuit board (PCB) that will support the application. This application report describes several techniques for optimizing a high-speed, 14-bit performance, differential driver PCB layout using a wideband operation
• Download
  Measuring Board Parasitics in High-Speed Analog Design
  PDF, 134 Kb, File published: Jul 7, 2003
  Successful circuit designs using high-speed amplifiers can depend upon understanding and identifying parasitic PCB components. Simulating a design while including PCB parasitics can protect against unpleasant production surprises. This application report discusses an easy method for measuring parasitic components in a prototype or final PC board design by using a standard oscilloscope and low freq
• Download
  Noise Analysis for High Speed Op Amps (Rev. A)
  PDF, 256 Kb, Revision: A, File published: Jan 17, 2005
  As system bandwidths have increased an accurate estimate of the noise contribution for each element in the signal channel has become increasingly important. Many designers are not however particularly comfortable with the calculations required to predict the total noise for an op amp or in the conversions between the different descriptions of noise. Considerable inconsistency between manufactu

Model Line

Manufacturer's Classification

• Semiconductors> Amplifiers> Operational Amplifiers (Op Amps)> High-Speed Op Amps (>=50MHz)