Datasheet Texas Instruments OPA843

ManufacturerTexas Instruments
SeriesOPA843
Datasheet Texas Instruments OPA843

Wideband, Low Distortion, Medium Gain, Voltage Feedback Operational Amplifier

Datasheets

Wideband, Low Distortion, Medium Gain, Voltage-Feedback Operational Amp datasheet
PDF, 855 Kb, Revision: C, File published: Dec 30, 2008
Extract from the document

Prices

Status

OPA843IDOPA843IDBVROPA843IDBVTOPA843IDBVTG4OPA843IDG4OPA843IDROPA843IDRG4
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoYesYesYesNoNoYes

Packaging

OPA843IDOPA843IDBVROPA843IDBVTOPA843IDBVTG4OPA843IDG4OPA843IDROPA843IDRG4
N1234567
Pin8555888
Package TypeDDBVDBVDBVDDD
Industry STD TermSOICSOT-23SOT-23SOT-23SOICSOICSOIC
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-G
Package QTY7530002502507525002500
CarrierTUBELARGE T&RSMALL T&RSMALL T&RTUBELARGE T&RLARGE T&R
Device MarkingOPAOARIOARIOARIOPA843843
Width (mm)3.911.61.61.63.913.913.91
Length (mm)4.92.92.92.94.94.94.9
Thickness (mm)1.581.21.21.21.581.581.58
Pitch (mm)1.27.95.95.951.271.271.27
Max Height (mm)1.751.451.451.451.751.751.75
Mechanical DataDownloadDownloadDownloadDownloadDownloadDownloadDownload

Parametrics

Parameters / ModelsOPA843ID
OPA843ID
OPA843IDBVR
OPA843IDBVR
OPA843IDBVT
OPA843IDBVT
OPA843IDBVTG4
OPA843IDBVTG4
OPA843IDG4
OPA843IDG4
OPA843IDR
OPA843IDR
OPA843IDRG4
OPA843IDRG4
2nd Harmonic, dBc76767676767676
3rd Harmonic, dBc102102102102102102102
@ MHz5555555
Acl, min spec gain, V/V3333333
Additional FeaturesDecompensatedDecompensatedDecompensatedDecompensatedDecompensatedDecompensatedDecompensated
ArchitectureBipolar,Voltage FBBipolar,Voltage FBBipolar,Voltage FBBipolar,Voltage FBBipolar,Voltage FBBipolar,Voltage FBBipolar,Voltage FB
BW @ Acl, MHz500500500500500500500
CMRR(Min), dB85858585858585
CMRR(Typ), dB95959595959595
GBW(Typ), MHz1500150015001500150015001500
Input Bias Current(Max), pA35000000350000003500000035000000350000003500000035000000
Iq per channel(Max), mA20.820.820.820.820.820.820.8
Iq per channel(Typ), mA20.220.220.220.220.220.220.2
Number of Channels1111111
Offset Drift(Typ), uV/C4444444
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Output Current(Typ), mA100100100100100100100
Package GroupSOICSOT-23SOT-23SOT-23SOICSOICSOIC
Package Size: mm2:W x L, PKG8SOIC: 29 mm2: 6 x 4.9(SOIC)5SOT-23: 8 mm2: 2.8 x 2.9(SOT-23)5SOT-23: 8 mm2: 2.8 x 2.9(SOT-23)5SOT-23: 8 mm2: 2.8 x 2.9(SOT-23)8SOIC: 29 mm2: 6 x 4.9(SOIC)8SOIC: 29 mm2: 6 x 4.9(SOIC)8SOIC: 29 mm2: 6 x 4.9(SOIC)
Rail-to-RailNoNoNoNoNoNoNo
RatingCatalogCatalogCatalogCatalogCatalogCatalogCatalog
Slew Rate(Typ), V/us1000100010001000100010001000
Total Supply Voltage(Max), +5V=5, +/-5V=1012121212121212
Total Supply Voltage(Min), +5V=5, +/-5V=108888888
Vn at 1kHz(Typ), nV/rtHz2222222
Vn at Flatband(Typ), nV/rtHz2222222
Vos (Offset Voltage @ 25C)(Max), mV1.21.21.21.21.21.21.2

Eco Plan

OPA843IDOPA843IDBVROPA843IDBVTOPA843IDBVTG4OPA843IDG4OPA843IDROPA843IDRG4
RoHSCompliantCompliantCompliantCompliantCompliantCompliantCompliant

Application Notes

  • Using a decompensated op amp for improved performance
    PDF, 352 Kb, File published: Mar 11, 2005
  • RLC Filter Design for ADC Interface Applications (Rev. A)
    PDF, 299 Kb, Revision: A, File published: May 13, 2015
    As high performance Analog-to-Digital Converters (ADCs) continue to improve in their performance, the last stage interface from the final amplifier into the converter inputs becomes a critical element in the system design if the full converter dynamic range is desired. This application note describes the performance and design equations for a simple passive 2nd-order filter used successfully in AD
  • ADS5500, OPA695: PC Board Layout for Low Distortion High-Speed ADC Drivers
    PDF, 273 Kb, File published: Apr 22, 2004
    Once an analog-to-digital converter (ADC) and a driver/interface have been selected for a given application, the next step to achieving excellent performance is laying out the printed circuit board (PCB) that will support the application. This application report describes several techniques for optimizing a high-speed, 14-bit performance, differential driver PCB layout using a wideband operation
  • Measuring Board Parasitics in High-Speed Analog Design
    PDF, 134 Kb, File published: Jul 7, 2003
    Successful circuit designs using high-speed amplifiers can depend upon understanding and identifying parasitic PCB components. Simulating a design while including PCB parasitics can protect against unpleasant production surprises. This application report discusses an easy method for measuring parasitic components in a prototype or final PC board design by using a standard oscilloscope and low freq
  • Noise Analysis for High Speed Op Amps (Rev. A)
    PDF, 256 Kb, Revision: A, File published: Jan 17, 2005
    As system bandwidths have increased an accurate estimate of the noise contribution for each element in the signal channel has become increasingly important. Many designers are not however particularly comfortable with the calculations required to predict the total noise for an op amp or in the conversions between the different descriptions of noise. Considerable inconsistency between manufactu

Model Line

Manufacturer's Classification

  • Semiconductors> Amplifiers> Operational Amplifiers (Op Amps)> High-Speed Op Amps (>=50MHz)