Datasheet Texas Instruments SCANSTA101

ManufacturerTexas Instruments
SeriesSCANSTA101
Datasheet Texas Instruments SCANSTA101

Low Voltage IEEE 1149.1 System Test Access (STA) Master

Datasheets

SCANSTA101 Low Voltage IEEE 1149.1 System Test Access (STA) Master datasheet
PDF, 1.3 Mb, Revision: J, File published: Apr 12, 2013
Extract from the document

Prices

Status

SCANSTA101SMSCANSTA101SM/NOPBSCANSTA101SMXSCANSTA101SMX/NOPB
Lifecycle StatusNRND (Not recommended for new designs)Active (Recommended for new designs)NRND (Not recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityNoNoNoYes

Packaging

SCANSTA101SMSCANSTA101SM/NOPBSCANSTA101SMXSCANSTA101SMX/NOPB
N1234
Pin49494949
Package TypeNZANZANZANZA
Industry STD TermNFBGANFBGANFBGANFBGA
JEDEC CodeS-PBGA-NS-PBGA-NS-PBGA-NS-PBGA-N
Package QTY41641620002000
CarrierJEDEC TRAY (10+1)JEDEC TRAY (10+1)LARGE T&RLARGE T&R
Device MarkingSCANSTA101SCANSTA101SMSM
Width (mm)7777
Length (mm)7777
Thickness (mm)1.41.41.41.4
Pitch (mm).8.8.8.8
Max Height (mm)1.51.51.51.5
Mechanical DataDownloadDownloadDownloadDownload

Parametrics

Parameters / ModelsSCANSTA101SM
SCANSTA101SM
SCANSTA101SM/NOPB
SCANSTA101SM/NOPB
SCANSTA101SMX
SCANSTA101SMX
SCANSTA101SMX/NOPB
SCANSTA101SMX/NOPB
Control InterfaceJTAG
Control Interface Voltage(V)3.3
Number of Ports1
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85
Operating Temperature Range(C)-40 to 85
Package GroupNFBGANFBGANFBGA
Package Size: mm2:W x L, PKG49NFBGA: 49 mm2: 7 x 7(NFBGA)49NFBGA: 49 mm2: 7 x 7(NFBGA)49NFBGA: 49 mm2: 7 x 7(NFBGA)
Pin/Package49NFBGA
RatingCatalogCatalogCatalog
Vdd(V)3.3V

Eco Plan

SCANSTA101SMSCANSTA101SM/NOPBSCANSTA101SMXSCANSTA101SMX/NOPB
RoHSTBDCompliantSee ti.comCompliant
Pb FreeNo

Application Notes

  • SCANSTA101 Quick Reference Guide
    PDF, 85 Kb, File published: Jan 7, 2010
  • JTAG Advanced Capabilities and System Design
    PDF, 448 Kb, File published: Mar 19, 2009

Model Line

Manufacturer's Classification

  • Semiconductors> Interface> Other Interface> Boundary SCAN (JTAG) and Port Control