Datasheet Texas Instruments SN74ALS114AN
| Manufacturer | Texas Instruments |
| Series | SN74ALS114A |
| Part Number | SN74ALS114AN |
Dual J-K Negative-Edge-Triggered Flip-Flops With Preset, Common CLR And CLK 14-PDIP 0 to 70
Datasheets
Dual J-K Negative-Edge-Triggered F-F w/ Preset, Common Clear, & Common Clock
PDF, 70 Kb, File published: May 1, 1986
Prices
Status
| Lifecycle Status | Obsolete (Manufacturer has discontinued the production of the device) |
| Manufacture's Sample Availability | No |
Packaging
| Pin | 14 |
| Package Type | N |
| Industry STD Term | PDIP |
| JEDEC Code | R-PDIP-T |
| Width (mm) | 6.35 |
| Length (mm) | 19.3 |
| Thickness (mm) | 3.9 |
| Pitch (mm) | 2.54 |
| Max Height (mm) | 5.08 |
| Mechanical Data | Download |
Eco Plan
| RoHS | Not Compliant |
| Pb Free | No |
Application Notes
- Advanced Schottky (ALS and AS) Logic FamiliesPDF, 1.9 Mb, File published: Aug 1, 1995
This document introduces the advanced Schottky family of clamped TTL integrated circuits (ICs). Detailed electrical characteristics of the 'AS and 'ALS devices with table formats are provided. Guidelines for designing high-performance digital systems using the Advanced Schottky family are given along with a brief summary of the solutions to most design decisions needed to implement systems using t
Model Line
Series: SN74ALS114A (1)
- SN74ALS114AN
Manufacturer's Classification
- Semiconductors > Logic > Flip-Flop/Latch/Register > J-K Flip-Flop
