Datasheet Texas Instruments SN74ALVCHR162601

ManufacturerTexas Instruments
SeriesSN74ALVCHR162601
Datasheet Texas Instruments SN74ALVCHR162601

18-Bit Universal Bus Transceiver With 3-State Outputs

Datasheets

Datasheet
TSP

Prices

Status

SN74ALVCHR162601DL
Lifecycle StatusActive (Recommended for new designs)
Manufacture's Sample AvailabilityNo

Packaging

SN74ALVCHR162601DL
N1
Pin56
Package TypeDL
Industry STD TermSSOP
JEDEC CodeR-PDSO-G
Package QTY20
CarrierTUBE
Device MarkingALVCHR162601
Width (mm)7.49
Length (mm)18.41
Thickness (mm)2.59
Pitch (mm).635
Max Height (mm)2.79
Mechanical DataDownload

Parametrics

Parameters / ModelsSN74ALVCHR162601DL
SN74ALVCHR162601DL
Approx. Price (US$)2.53 | 1ku
Bits(#)18
F @ Nom Voltage(Max)(Mhz)150
ICC @ Nom Voltage(Max)(mA)0.04
Operating Temperature Range(C)-40 to 85
Output Drive (IOL/IOH)(Max)(mA)-12/12
Package GroupSSOP
Package Size: mm2:W x L (PKG)56SSOP: 191 mm2: 10.35 x 18.42(SSOP)
RatingCatalog
Schmitt TriggerNo
Technology FamilyALVC
VCC(Max)(V)3.6
VCC(Min)(V)1.65
Voltage(Nom)(V)1.8
3.3
tpd @ Nom Voltage(Max)(ns)5.4

Eco Plan

SN74ALVCHR162601DL
RoHSNot Compliant
Pb FreeNo

Application Notes

  • TI SN74ALVC16835 Component Specification Analysis for PC100
    PDF, 43 Kb, File published: Aug 3, 1998
    The PC100 standard establishes design parameters for the PC SDRAM DIMM that is designed to operate at 100 MHz. The 168-pin, 8-byte, registered SDRAM DIMM is a JEDEC-defined device (JC-42.5-96-146A). Some of the defined signal paths include data signals, address signals, and control signals. This application report discusses the SN74ALVC16835 18-bit universal bus driver that is available from T
  • Logic Solutions for PC-100 SDRAM Registered DIMMs (Rev. A)
    PDF, 96 Kb, Revision: A, File published: May 13, 1998
    Design of high-performance personal computer (PC) systems that are capable of meeting the needs imposed by modern operating systems and software includes the use of large banks of SDRAMs on DIMMs (see Figure 1).To meet the demands of stable functionality over the broad spectrum of operating environments, meet system timing needs, and to support data integrity, the loads presented by the large
  • Bus-Hold Circuit
    PDF, 418 Kb, File published: Feb 5, 2001
    When designing systems that include CMOS devices, designers must pay special attention to the operating condition in which all of the bus drivers are in an inactive, high-impedance condition (3-state). Unless special measures are taken, this condition can lead to undefined levels and, thus, to a significant increase in the device?s power dissipation. In extreme cases, this leads to oscillation of
  • 16-Bit Widebus Logic Families in 56-Ball 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)
    PDF, 895 Kb, Revision: B, File published: May 22, 2002
    TI?s 56-ball MicroStar Jr.E package registered under JEDEC MO-225 has demonstrated through modeling and experimentation that it is an optimal solution for reducing inductance and capacitance improving thermal performance and minimizing board area usage in integrated bus functions. Multiple functions released in the 56-ball MicroStar Jr.E package have superior performance characteristics compa
  • Benefits & Issues of Migrating 5-V and 3.3-V Logic to Lower-Voltage Supplies (Rev. A)
    PDF, 154 Kb, Revision: A, File published: Sep 8, 1999
    In the last few years the trend toward reducing supply voltage (VCC) has continued as reflected in an additional specification of 2.5-V VCC for the AVC ALVT ALVC LVC LV and the CBTLV families.In this application report the different logic levels at VCC of 5 V 3.3 V 2.5 V and 1.8 V are compared. Within the report the possibilities for migration from 5-V logic and 3.3-V logic families

Model Line

Series: SN74ALVCHR162601 (1)

Manufacturer's Classification

  • Semiconductors> Logic> Universal Bus Function> Universal Bus Transceiver (UBT)