Datasheet Texas Instruments SN74AUC2G00

ManufacturerTexas Instruments
SeriesSN74AUC2G00
Datasheet Texas Instruments SN74AUC2G00

DUAL 2-INPUT POSITIVE-NAND GATE

Datasheets

SN74AUC2G00 datasheet
PDF, 923 Kb, Revision: C, File published: Jan 11, 2007
Extract from the document

Prices

Status

SN74AUC2G00DCTRSN74AUC2G00DCTRE4SN74AUC2G00DCURSN74AUC2G00DCURE4SN74AUC2G00YZPR
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesYesYesYesNo

Packaging

SN74AUC2G00DCTRSN74AUC2G00DCTRE4SN74AUC2G00DCURSN74AUC2G00DCURE4SN74AUC2G00YZPR
N12345
Pin88888
Package TypeDCTDCTDCUDCUYZP
Industry STD TermSSOPSSOPVSSOPVSSOPDSBGA
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-XBGA-N
Package QTY3000300030003000
CarrierLARGE T&RLARGE T&RLARGE T&RLARGE T&R
Device MarkingU00U00URUAN
Width (mm)2.82.8222.25
Length (mm)2.952.952.32.31.25
Thickness (mm)1.291.29.85.85.31
Pitch (mm).65.65.5.5.5
Max Height (mm)1.31.3.9.9.5
Mechanical DataDownloadDownloadDownloadDownloadDownload

Parametrics

Parameters / ModelsSN74AUC2G00DCTR
SN74AUC2G00DCTR
SN74AUC2G00DCTRE4
SN74AUC2G00DCTRE4
SN74AUC2G00DCUR
SN74AUC2G00DCUR
SN74AUC2G00DCURE4
SN74AUC2G00DCURE4
SN74AUC2G00YZPR
SN74AUC2G00YZPR
3-State OutputNoNoNoNoNo
Approx. Price (US$)0.14 | 1ku
Bits2222
Bits(#)2
F @ Nom Voltage(Max), Mhz250250250250
F @ Nom Voltage(Max)(Mhz)250
Gate TypeNANDNANDNANDNANDNAND
ICC @ Nom Voltage(Max), mA0.010.010.010.01
ICC @ Nom Voltage(Max)(mA)0.01
LogicTrueTrueTrueTrueTrue
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85
Operating Temperature Range(C)-40 to 85
Output Drive (IOL/IOH)(Max), mA9/-99/-99/-99/-9
Output Drive (IOL/IOH)(Max)(mA)9/-9
Package GroupSM8SM8VSSOPVSSOPDSBGA
Package Size: mm2:W x L, PKG8SM8: 12 mm2: 4 x 2.95(SM8)8SM8: 12 mm2: 4 x 2.95(SM8)8VSSOP: 6 mm2: 3.1 x 2(VSSOP)See datasheet (DSBGA)
Package Size: mm2:W x L (PKG)See datasheet (DSBGA)
RatingCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNo
Special FeaturesIOFF,low power consumption,low tpdIOFF,low power consumption,low tpdIOFF,low power consumption,low tpdIOFF
low power consumption
low tpd
IOFF,low power consumption,low tpd
Sub-FamilyNAND GateNAND GateNAND GateNAND GateNAND Gate
Technology FamilyAUCAUCAUCAUCAUC
VCC(Max), V2.72.72.72.7
VCC(Max)(V)2.7
VCC(Min), V0.80.80.80.8
VCC(Min)(V)0.8
Voltage(Nom), V0.8,1.2,1.5,1.8,2.50.8,1.2,1.5,1.8,2.50.8,1.2,1.5,1.8,2.50.8,1.2,1.5,1.8,2.5
Voltage(Nom)(V)0.8
1.2
1.5
1.8
2.5
tpd @ Nom Voltage(Max), ns8,2.5,1.6,1.2,18,2.5,1.6,1.2,18,2.5,1.6,1.2,18,2.5,1.6,1.2,1
tpd @ Nom Voltage(Max)(ns)8
2.5
1.6
1.2
1

Eco Plan

SN74AUC2G00DCTRSN74AUC2G00DCTRE4SN74AUC2G00DCURSN74AUC2G00DCURE4SN74AUC2G00YZPR
RoHSCompliantCompliantCompliantNot CompliantCompliant
Pb FreeNo

Application Notes

  • Designing With TI Ultra-Low-Voltage CMOS (AUC) Octals and Widebus Devices
    PDF, 374 Kb, File published: Mar 21, 2003
    System designers are continuously seeking ways to improve signal integrity, increase speed, and reduce power consumption in personal computers, telecommunication equipment, and other electronic systems. The Texas Instruments (TI) next-generation Advanced Ultra-low-voltage CMOS (AUC) octals and Widebus(TM) devices are designed to achieve these goals. These devices are designed for a 0.8-V to 2.7-V

Model Line

Manufacturer's Classification

  • Semiconductors> Logic> Little Logic