Datasheet Texas Instruments SN74AUC2G07

ManufacturerTexas Instruments
SeriesSN74AUC2G07
Datasheet Texas Instruments SN74AUC2G07

Dual Buffer/Driver with Open-Drain Outputs

Datasheets

Dual Buffer/Driver With Open-Drain Outputs datasheet
PDF, 967 Kb, Revision: D, File published: Jun 17, 2008
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Prices

Status

SN74AUC2G07DBVRSN74AUC2G07DBVTSN74AUC2G07DCKRSN74AUC2G07DCKRE4SN74AUC2G07DCKRG4SN74AUC2G07YZPR
Lifecycle StatusActive (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)Active (Recommended for new designs)
Manufacture's Sample AvailabilityYesYesNoYesYesYes

Packaging

SN74AUC2G07DBVRSN74AUC2G07DBVTSN74AUC2G07DCKRSN74AUC2G07DCKRE4SN74AUC2G07DCKRG4SN74AUC2G07YZPR
N123456
Pin666666
Package TypeDBVDBVDCKDCKDCKYZP
Industry STD TermSOT-23SOT-23SOT-SC70SOT-SC70SOT-SC70DSBGA
JEDEC CodeR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-PDSO-GR-XBGA-N
Package QTY30002503000300030003000
CarrierLARGE T&RSMALL T&RLARGE T&RLARGE T&RLARGE T&RLARGE T&R
Device MarkingU075U07RUVRUVRUVRUVN
Width (mm)1.61.61.251.251.25.9
Length (mm)2.92.92221.5
Thickness (mm)1.21.2.9.9.92
Pitch (mm).95.95.65.65.65.5
Max Height (mm)1.451.451.11.11.1.5
Mechanical DataDownloadDownloadDownloadDownloadDownloadDownload

Parametrics

Parameters / ModelsSN74AUC2G07DBVR
SN74AUC2G07DBVR
SN74AUC2G07DBVT
SN74AUC2G07DBVT
SN74AUC2G07DCKR
SN74AUC2G07DCKR
SN74AUC2G07DCKRE4
SN74AUC2G07DCKRE4
SN74AUC2G07DCKRG4
SN74AUC2G07DCKRG4
SN74AUC2G07YZPR
SN74AUC2G07YZPR
3-State OutputNoNoNoNoNoNo
Bits222222
F @ Nom Voltage(Max), Mhz250250250250250250
Gate TypeOPEN DRAIN BUFFEROPEN DRAIN BUFFEROPEN DRAIN BUFFEROPEN DRAIN BUFFEROPEN DRAIN BUFFEROPEN DRAIN BUFFER
ICC @ Nom Voltage(Max), mA0.010.010.010.010.010.01
LogicTrueTrueTrueTrueTrueTrue
Operating Temperature Range, C-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85-40 to 85
Output Drive (IOL/IOH)(Max), mA9/-99/-99/-99/-99/-99/-9
Package GroupSOT-23SOT-23SC70SC70SC70DSBGA
Package Size: mm2:W x L, PKG6SOT-23: 8 mm2: 2.8 x 2.9(SOT-23)6SOT-23: 8 mm2: 2.8 x 2.9(SOT-23)6SC70: 4 mm2: 2.1 x 2(SC70)6SC70: 4 mm2: 2.1 x 2(SC70)6SC70: 4 mm2: 2.1 x 2(SC70)See datasheet (DSBGA)
RatingCatalogCatalogCatalogCatalogCatalogCatalog
Schmitt TriggerNoNoNoNoNoNo
Special FeaturesIOFF,low power consumption,low tpd,open drainIOFF,low power consumption,low tpd,open drainIOFF,low power consumption,low tpd,open drainIOFF,low power consumption,low tpd,open drainIOFF,low power consumption,low tpd,open drainIOFF,low power consumption,low tpd,open drain
Sub-FamilyNon-Inverting Buffer/DriverNon-Inverting Buffer/DriverNon-Inverting Buffer/DriverNon-Inverting Buffer/DriverNon-Inverting Buffer/DriverNon-Inverting Buffer/Driver
Technology FamilyAUCAUCAUCAUCAUCAUC
VCC(Max), V2.72.72.72.72.72.7
VCC(Min), V1.81.81.81.81.81.8
Voltage(Nom), V0.8,1.2,1.5,1.8,2.50.8,1.2,1.5,1.8,2.50.8,1.2,1.5,1.8,2.50.8,1.2,1.5,1.8,2.50.8,1.2,1.5,1.8,2.50.8,1.2,1.5,1.8,2.5
tpd @ Nom Voltage(Max), ns4.3,3,2.2,2.5,1.64.3,3,2.2,2.5,1.64.3,3,2.2,2.5,1.64.3,3,2.2,2.5,1.64.3,3,2.2,2.5,1.64.3,3,2.2,2.5,1.6

Eco Plan

SN74AUC2G07DBVRSN74AUC2G07DBVTSN74AUC2G07DCKRSN74AUC2G07DCKRE4SN74AUC2G07DCKRG4SN74AUC2G07YZPR
RoHSCompliantCompliantCompliantCompliantCompliantCompliant

Application Notes

  • Designing With TI Ultra-Low-Voltage CMOS (AUC) Octals and Widebus Devices
    PDF, 374 Kb, File published: Mar 21, 2003
    System designers are continuously seeking ways to improve signal integrity, increase speed, and reduce power consumption in personal computers, telecommunication equipment, and other electronic systems. The Texas Instruments (TI) next-generation Advanced Ultra-low-voltage CMOS (AUC) octals and Widebus(TM) devices are designed to achieve these goals. These devices are designed for a 0.8-V to 2.7-V

Model Line

Manufacturer's Classification

  • Semiconductors> Logic> Little Logic