Datasheet Texas Instruments SN74AUC2G53

Manufacturer	Texas Instruments
Series	SN74AUC2G53

Single Pole, Double-Throw (SPDT) Analog Switch or 2:1 Analog Multiplexer/Demultiplexer

Datasheets

PDF, 1.0 Mb, Revision: C, File published: Jan 5, 2009

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	SN74AUC2G53DCTR	SN74AUC2G53DCTRE4	SN74AUC2G53DCTRG4	SN74AUC2G53DCUR	SN74AUC2G53DCURG4	SN74AUC2G53YZPR
Lifecycle Status	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)	Active (Recommended for new designs)
Manufacture's Sample Availability	Yes	Yes	Yes	Yes	Yes	No

	SN74AUC2G53DCTR	SN74AUC2G53DCTRE4	SN74AUC2G53DCTRG4	SN74AUC2G53DCUR	SN74AUC2G53DCURG4	SN74AUC2G53YZPR
N	1	2	3	4	5	6
Pin	8	8	8	8	8	8
Package Type	DCT	DCT	DCT	DCU	DCU	YZP
Industry STD Term	SSOP	SSOP	SSOP	VSSOP	VSSOP	DSBGA
JEDEC Code	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-PDSO-G	R-XBGA-N
Package QTY	3000	3000	3000	3000	3000	3000
Carrier	LARGE T&R	LARGE T&R	LARGE T&R	LARGE T&R	LARGE T&R	LARGE T&R
Device Marking	U53	Z	U53	U53R	U53R	U47
Width (mm)	2.8	2.8	2.8	2	2	2.25
Length (mm)	2.95	2.95	2.95	2.3	2.3	1.25
Thickness (mm)	1.29	1.29	1.29	.85	.85	.31
Pitch (mm)	.65	.65	.65	.5	.5	.5
Max Height (mm)	1.3	1.3	1.3	.9	.9	.5
Mechanical Data	Download	Download	Download	Download	Download	Download

Parameters / Models	SN74AUC2G53DCTR	SN74AUC2G53DCTRE4	SN74AUC2G53DCTRG4	SN74AUC2G53DCUR	SN74AUC2G53DCURG4	SN74AUC2G53YZPR
Bandwidth, MHz	500	500	500	500	500	500
Configuration	2:1 SPDT	2:1 SPDT	2:1 SPDT	2:1 SPDT	2:1 SPDT	2:1 SPDT
ESD Charged Device Model, kV	1	1	1	1	1	1
ESD HBM, kV	2	2	2	2	2	2
Input/Ouput Voltage(Max), V	2.7	2.7	2.7	2.7	2.7	2.7
Input/Output Continuous Current(Max), mA	50	50	50	50	50	50
Input/Output OFF-state Capacitance(Typ), pF	3	3	3	3	3	3
Input/Output ON-state Capacitance(Typ), pF	9	9	9	9	9	9
Number of Channels	1	1	1	1	1	1
OFF-state leakage current(Max), µA	1	1	1	1	1	1
ON-state leakage current(Max), µA	1	1	1	1	1	1
Operating Temperature Range, C	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85	-40 to 85
Package Group	SM8	SM8	SM8	VSSOP	VSSOP	DSBGA
Package Size: mm2:W x L, PKG	8SM8: 12 mm2: 4 x 2.95(SM8)	8SM8: 12 mm2: 4 x 2.95(SM8)	8SM8: 12 mm2: 4 x 2.95(SM8)	8VSSOP: 6 mm2: 3.1 x 2(VSSOP)	8VSSOP: 6 mm2: 3.1 x 2(VSSOP)	See datasheet (DSBGA)
Rating	Catalog	Catalog	Catalog	Catalog	Catalog	Catalog
Ron(Max), Ohms	40	40	40	40	40	40
Ron(Typ), Ohms	6	6	6	6	6	6
Supply Current(Max), uA	10	10	10	10	10	10
Supply Range, Max	2.7	2.7	2.7	2.7	2.7	2.7
VIH(Min), V	vcc*.65	vcc*.65	vcc*.65	vcc*.65	vcc*.65	vcc*.65
VIL(Max), V	vcc*.35	vcc*.35	vcc*.35	vcc*.35	vcc*.35	vcc*.35
Vdd(Max), V	2.7	2.7	2.7	2.7	2.7	2.7
Vdd(Min), V	0.8	0.8	0.8	0.8	0.8	0.8
Vss(Max), V	N/A	N/A	N/A	N/A	N/A	N/A
Vss(Min), V	N/A	N/A	N/A	N/A	N/A	N/A

	SN74AUC2G53DCTR	SN74AUC2G53DCTRE4	SN74AUC2G53DCTRG4	SN74AUC2G53DCUR	SN74AUC2G53DCURG4	SN74AUC2G53YZPR
RoHS	Compliant	Compliant	Compliant	Compliant	Compliant	Compliant

Download
Designing With TI Ultra-Low-Voltage CMOS (AUC) Octals and Widebus Devices
PDF, 374 Kb, File published: Mar 21, 2003
System designers are continuously seeking ways to improve signal integrity, increase speed, and reduce power consumption in personal computers, telecommunication equipment, and other electronic systems. The Texas Instruments (TI) next-generation Advanced Ultra-low-voltage CMOS (AUC) octals and Widebus(TM) devices are designed to achieve these goals. These devices are designed for a 0.8-V to 2.7-V

Series: SN74AUC2G53 (6)